Mercurial > illumos > git > illumos-joyent
changeset 920:5061227f5943 onnv_28
PSARC 2005/503 Boston and Seattle Platform Software Support
6342066 Add Boston and Seattle support to Solaris
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--- a/usr/src/Makefile Mon Nov 14 22:42:12 2005 -0800 +++ b/usr/src/Makefile Mon Nov 14 22:43:41 2005 -0800 @@ -255,6 +255,8 @@ @cd uts/sun4u/ents; pwd; $(MAKE) EXPORT_SRC @cd uts/sun4u/excalibur; pwd; $(MAKE) EXPORT_SRC @cd uts/sun4u/chicago; pwd; $(MAKE) EXPORT_SRC + @cd uts/sun4u/boston; pwd; $(MAKE) EXPORT_SRC + @cd uts/sun4u/seattle; pwd; $(MAKE) EXPORT_SRC @cd uts/sun4u/littleneck; pwd; $(MAKE) EXPORT_SRC @cd uts/sun4u/lw2plus; pwd; $(MAKE) EXPORT_SRC @cd uts/sun4u/lw8; pwd; $(MAKE) EXPORT_SRC
--- a/usr/src/lib/cfgadm_plugins/Makefile.com Mon Nov 14 22:42:12 2005 -0800 +++ b/usr/src/lib/cfgadm_plugins/Makefile.com Mon Nov 14 22:43:41 2005 -0800 @@ -47,6 +47,8 @@ LINKED_PLATFORMS += SUNW,Sun-Blade-1500 LINKED_PLATFORMS += SUNW,Sun-Blade-2500 LINKED_PLATFORMS += SUNW,A70 +LINKED_PLATFORMS += SUNW,Sun-Fire-V445 +LINKED_PLATFORMS += SUNW,Sun-Fire-V215 LINKED_PLATFORMS += SUNW,Sun-Fire LINKED_PLATFORMS += SUNW,Sun-Fire-V240 LINKED_PLATFORMS += SUNW,Sun-Fire-V250
--- a/usr/src/lib/libc_psr/spec/sun4u-us3/Makefile.links Mon Nov 14 22:42:12 2005 -0800 +++ b/usr/src/lib/libc_psr/spec/sun4u-us3/Makefile.links Mon Nov 14 22:43:41 2005 -0800 @@ -38,6 +38,8 @@ LINKED_PLATFORMS += SUNW,Sun-Blade-1500 LINKED_PLATFORMS += SUNW,Sun-Blade-2500 LINKED_PLATFORMS += SUNW,A70 +LINKED_PLATFORMS += SUNW,Sun-Fire-V445 +LINKED_PLATFORMS += SUNW,Sun-Fire-V215 LINKED_PLATFORMS += SUNW,Sun-Fire LINKED_PLATFORMS += SUNW,Sun-Fire-V240 LINKED_PLATFORMS += SUNW,Sun-Fire-V250
--- a/usr/src/lib/libc_psr/sun4u-us3/Makefile.com Mon Nov 14 22:42:12 2005 -0800 +++ b/usr/src/lib/libc_psr/sun4u-us3/Makefile.com Mon Nov 14 22:43:41 2005 -0800 @@ -57,6 +57,8 @@ LINKED_PLATFORMS += SUNW,Sun-Blade-1500 LINKED_PLATFORMS += SUNW,Sun-Blade-2500 LINKED_PLATFORMS += SUNW,A70 +LINKED_PLATFORMS += SUNW,Sun-Fire-V445 +LINKED_PLATFORMS += SUNW,Sun-Fire-V215 LINKED_PLATFORMS += SUNW,Netra-CP3010 LINKED_PLATFORMS += SUNW,Sun-Fire LINKED_PLATFORMS += SUNW,Sun-Fire-V240
--- a/usr/src/lib/libmd5_psr/Makefile.com Mon Nov 14 22:42:12 2005 -0800 +++ b/usr/src/lib/libmd5_psr/Makefile.com Mon Nov 14 22:43:41 2005 -0800 @@ -79,6 +79,8 @@ LINKED_PLATFORMS += SUNW,Sun-Blade-1500 LINKED_PLATFORMS += SUNW,Sun-Blade-2500 LINKED_PLATFORMS += SUNW,A70 +LINKED_PLATFORMS += SUNW,Sun-Fire-V445 +LINKED_PLATFORMS += SUNW,Sun-Fire-V215 LINKED_PLATFORMS += SUNW,Sun-Fire LINKED_PLATFORMS += SUNW,Sun-Fire-V240 LINKED_PLATFORMS += SUNW,Sun-Fire-V250
--- a/usr/src/lib/libmd5_psr/spec/Makefile.com Mon Nov 14 22:42:12 2005 -0800 +++ b/usr/src/lib/libmd5_psr/spec/Makefile.com Mon Nov 14 22:43:41 2005 -0800 @@ -47,6 +47,8 @@ LINKED_PLATFORMS += SUNW,Sun-Blade-1500 LINKED_PLATFORMS += SUNW,Sun-Blade-2500 LINKED_PLATFORMS += SUNW,A70 +LINKED_PLATFORMS += SUNW,Sun-Fire-V445 +LINKED_PLATFORMS += SUNW,Sun-Fire-V215 LINKED_PLATFORMS += SUNW,Sun-Fire LINKED_PLATFORMS += SUNW,Sun-Fire-V240 LINKED_PLATFORMS += SUNW,Sun-Fire-V250
--- a/usr/src/pkgdefs/SUNWcakr.u/prototype_com Mon Nov 14 22:42:12 2005 -0800 +++ b/usr/src/pkgdefs/SUNWcakr.u/prototype_com Mon Nov 14 22:43:41 2005 -0800 @@ -164,6 +164,22 @@ d none platform/SUNW,A70/kernel/misc 755 root sys d none platform/SUNW,A70/kernel/misc/sparcv9 755 root sys f none platform/SUNW,A70/kernel/misc/sparcv9/platmod 755 root sys +d none platform/SUNW,Sun-Fire-V445 755 root sys +d none platform/SUNW,Sun-Fire-V445/kernel 755 root sys +d none platform/SUNW,Sun-Fire-V445/kernel/crypto 755 root sys +d none platform/SUNW,Sun-Fire-V445/kernel/crypto/sparcv9 755 root sys +s none platform/SUNW,Sun-Fire-V445/kernel/crypto/sparcv9/aes=../../../../sun4u-us3/kernel/crypto/sparcv9/aes +d none platform/SUNW,Sun-Fire-V445/kernel/misc 755 root sys +d none platform/SUNW,Sun-Fire-V445/kernel/misc/sparcv9 755 root sys +f none platform/SUNW,Sun-Fire-V445/kernel/misc/sparcv9/platmod 755 root sys +d none platform/SUNW,Sun-Fire-V215 755 root sys +d none platform/SUNW,Sun-Fire-V215/kernel 755 root sys +d none platform/SUNW,Sun-Fire-V215/kernel/crypto 755 root sys +d none platform/SUNW,Sun-Fire-V215/kernel/crypto/sparcv9 755 root sys +s none platform/SUNW,Sun-Fire-V215/kernel/crypto/sparcv9/aes=../../../../sun4u-us3/kernel/crypto/sparcv9/aes +d none platform/SUNW,Sun-Fire-V215/kernel/misc 755 root sys +d none platform/SUNW,Sun-Fire-V215/kernel/misc/sparcv9 755 root sys +f none platform/SUNW,Sun-Fire-V215/kernel/misc/sparcv9/platmod 755 root sys d none platform/SUNW,Sun-Fire 755 root sys d none platform/SUNW,Sun-Fire-15000 755 root sys d none platform/SUNW,Sun-Fire-15000/kernel 755 root sys @@ -376,6 +392,7 @@ f none platform/sun4u/kernel/drv/rmclomv.conf 644 root sys f none platform/sun4u/kernel/drv/sbusmem.conf 644 root sys d none platform/sun4u/kernel/drv/sparcv9 755 root sys +f none platform/sun4u/kernel/drv/sparcv9/adm1026 755 root sys f none platform/sun4u/kernel/drv/sparcv9/adm1031 755 root sys f none platform/sun4u/kernel/drv/sparcv9/bbc_beep 755 root sys f none platform/sun4u/kernel/drv/sparcv9/ctsmc 755 root sys @@ -383,6 +400,7 @@ f none platform/sun4u/kernel/drv/sparcv9/dma 755 root sys f none platform/sun4u/kernel/drv/sparcv9/dmfe 755 root sys f none platform/sun4u/kernel/drv/sparcv9/ebus 755 root sys +f none platform/sun4u/kernel/drv/sparcv9/epic 755 root sys f none platform/sun4u/kernel/drv/sparcv9/fd 755 root sys f none platform/sun4u/kernel/drv/sparcv9/gpio_87317 755 root sys f none platform/sun4u/kernel/drv/sparcv9/grbeep 755 root sys
--- a/usr/src/pkgdefs/SUNWcar.u/prototype_com Mon Nov 14 22:42:12 2005 -0800 +++ b/usr/src/pkgdefs/SUNWcar.u/prototype_com Mon Nov 14 22:43:41 2005 -0800 @@ -56,6 +56,8 @@ d none platform/SUNW,Sun-Blade-1500 755 root sys d none platform/SUNW,Sun-Blade-2500 755 root sys d none platform/SUNW,A70 755 root sys +d none platform/SUNW,Sun-Fire-V445 755 root sys +d none platform/SUNW,Sun-Fire-V215 755 root sys d none platform/SUNW,Sun-Fire 755 root sys d none platform/SUNW,Sun-Fire-15000 755 root sys d none platform/SUNW,Sun-Fire-V240 755 root sys @@ -83,6 +85,7 @@ s none platform/SUNW,Sun-Fire-V210=SUNW,Sun-Fire-V240 s none platform/SUNW,Netra-240=SUNW,Sun-Fire-V240 s none platform/SUNW,Netra-210=SUNW,Sun-Fire-V240 +s none platform/SUNW,Sun-Fire-V245=SUNW,Sun-Fire-V215 d none platform/sun4u 755 root sys d none platform/sun4u/lib/sparcv9 755 root bin d none platform/SUNW,Ultra-2/lib/sparcv9 755 root bin @@ -100,6 +103,8 @@ d none platform/SUNW,Sun-Blade-1500/lib/sparcv9 755 root bin d none platform/SUNW,Sun-Blade-2500/lib/sparcv9 755 root bin d none platform/SUNW,A70/lib/sparcv9 755 root bin +d none platform/SUNW,Sun-Fire-V445/lib/sparcv9 755 root bin +d none platform/SUNW,Sun-Fire-V215/lib/sparcv9 755 root bin d none platform/SUNW,Sun-Fire-15000/lib/sparcv9 755 root bin d none platform/SUNW,Sun-Fire-V240/lib/sparcv9 755 root bin d none platform/SUNW,Sun-Fire-V250/lib/sparcv9 755 root bin @@ -127,6 +132,8 @@ s none platform/SUNW,Sun-Blade-1500/lib/sparcv9/libc_psr.so.1=../../../sun4u-us3/lib/sparcv9/libc_psr.so.1 s none platform/SUNW,Sun-Blade-2500/lib/sparcv9/libc_psr.so.1=../../../sun4u-us3/lib/sparcv9/libc_psr.so.1 s none platform/SUNW,A70/lib/sparcv9/libc_psr.so.1=../../../sun4u-us3/lib/sparcv9/libc_psr.so.1 +s none platform/SUNW,Sun-Fire-V445/lib/sparcv9/libc_psr.so.1=../../../sun4u-us3/lib/sparcv9/libc_psr.so.1 +s none platform/SUNW,Sun-Fire-V215/lib/sparcv9/libc_psr.so.1=../../../sun4u-us3/lib/sparcv9/libc_psr.so.1 s none platform/SUNW,Netra-CP3010/lib/sparcv9/libc_psr.so.1=../../../sun4u-us3/lib/sparcv9/libc_psr.so.1 s none platform/SUNW,Sun-Fire-15000/lib/sparcv9/libc_psr.so.1=../../../sun4u-us3/lib/sparcv9/libc_psr.so.1 s none platform/SUNW,Sun-Fire-V240/lib/sparcv9/libc_psr.so.1=../../../sun4u-us3/lib/sparcv9/libc_psr.so.1 @@ -159,6 +166,8 @@ s none platform/SUNW,Sun-Blade-1500/lib/sparcv9/libmd5_psr.so.1=../../../sun4u/lib/sparcv9/libmd5_psr.so.1 s none platform/SUNW,Sun-Blade-2500/lib/sparcv9/libmd5_psr.so.1=../../../sun4u/lib/sparcv9/libmd5_psr.so.1 s none platform/SUNW,A70/lib/sparcv9/libmd5_psr.so.1=../../../sun4u/lib/sparcv9/libmd5_psr.so.1 +s none platform/SUNW,Sun-Fire-V445/lib/sparcv9/libmd5_psr.so.1=../../../sun4u/lib/sparcv9/libmd5_psr.so.1 +s none platform/SUNW,Sun-Fire-V215/lib/sparcv9/libmd5_psr.so.1=../../../sun4u/lib/sparcv9/libmd5_psr.so.1 s none platform/SUNW,Netra-CP3010/lib/sparcv9/libmd5_psr.so.1=../../../sun4u/lib/sparcv9/libmd5_psr.so.1 s none platform/SUNW,Sun-Fire-15000/lib/sparcv9/libmd5_psr.so.1=../../../sun4u/lib/sparcv9/libmd5_psr.so.1 s none platform/SUNW,Sun-Fire-480R/lib/sparcv9/libmd5_psr.so.1=../../../sun4u/lib/sparcv9/libmd5_psr.so.1 @@ -194,6 +203,8 @@ d none platform/SUNW,Sun-Blade-1500/lib 755 root bin d none platform/SUNW,Sun-Blade-2500/lib 755 root bin d none platform/SUNW,A70/lib 755 root bin +d none platform/SUNW,Sun-Fire-V445/lib 755 root bin +d none platform/SUNW,Sun-Fire-V215/lib 755 root bin d none platform/SUNW,Sun-Fire-15000/lib 755 root bin d none platform/SUNW,Sun-Fire-V240/lib 755 root bin d none platform/SUNW,Sun-Fire-V250/lib 755 root bin @@ -236,6 +247,8 @@ s none platform/SUNW,Sun-Blade-1500/lib/libc_psr.so.1=../../sun4u-us3/lib/libc_psr.so.1 s none platform/SUNW,Sun-Blade-2500/lib/libc_psr.so.1=../../sun4u-us3/lib/libc_psr.so.1 s none platform/SUNW,A70/lib/libc_psr.so.1=../../sun4u-us3/lib/libc_psr.so.1 +s none platform/SUNW,Sun-Fire-V445/lib/libc_psr.so.1=../../sun4u-us3/lib/libc_psr.so.1 +s none platform/SUNW,Sun-Fire-V215/lib/libc_psr.so.1=../../sun4u-us3/lib/libc_psr.so.1 s none platform/SUNW,Netra-CP3010/lib/libc_psr.so.1=../../sun4u-us3/lib/libc_psr.so.1 s none platform/SUNW,Sun-Fire/lib/libc_psr.so.1=../../sun4u-us3/lib/libc_psr.so.1 s none platform/SUNW,Sun-Fire-V240/lib/libc_psr.so.1=../../sun4u-us3/lib/libc_psr.so.1 @@ -271,6 +284,8 @@ s none platform/SUNW,Sun-Blade-1500/lib/libmd5_psr.so.1=../../sun4u/lib/libmd5_psr.so.1 s none platform/SUNW,Sun-Blade-2500/lib/libmd5_psr.so.1=../../sun4u/lib/libmd5_psr.so.1 s none platform/SUNW,A70/lib/libmd5_psr.so.1=../../sun4u/lib/libmd5_psr.so.1 +s none platform/SUNW,Sun-Fire-V445/lib/libmd5_psr.so.1=../../sun4u/lib/libmd5_psr.so.1 +s none platform/SUNW,Sun-Fire-V215/lib/libmd5_psr.so.1=../../sun4u/lib/libmd5_psr.so.1 s none platform/SUNW,Netra-CP3010/lib/libmd5_psr.so.1=../../sun4u/lib/libmd5_psr.so.1 s none platform/SUNW,Sun-Fire/lib/libmd5_psr.so.1=../../sun4u/lib/libmd5_psr.so.1 s none platform/SUNW,Sun-Fire-V240/lib/libmd5_psr.so.1=../../sun4u/lib/libmd5_psr.so.1
--- a/usr/src/pkgdefs/SUNWcryr/prototype_sparc Mon Nov 14 22:42:12 2005 -0800 +++ b/usr/src/pkgdefs/SUNWcryr/prototype_sparc Mon Nov 14 22:43:41 2005 -0800 @@ -75,6 +75,8 @@ d none platform/SUNW,Sun-Blade-1500 755 root sys d none platform/SUNW,Sun-Blade-2500 755 root sys d none platform/SUNW,A70 755 root sys +d none platform/SUNW,Sun-Fire-V445 755 root sys +d none platform/SUNW,Sun-Fire-V215 755 root sys d none platform/SUNW,Netra-CP3010 755 root sys d none platform/SUNW,Sun-Fire 755 root sys d none platform/SUNW,Sun-Fire-15000 755 root sys @@ -100,6 +102,14 @@ d none platform/SUNW,A70/kernel/crypto 755 root sys d none platform/SUNW,A70/kernel/crypto/sparcv9 755 root sys s none platform/SUNW,A70/kernel/crypto/sparcv9/aes256=../../../../sun4u-us3/kernel/crypto/sparcv9/aes256 +d none platform/SUNW,Sun-Fire-V445/kernel 755 root sys +d none platform/SUNW,Sun-Fire-V445/kernel/crypto 755 root sys +d none platform/SUNW,Sun-Fire-V445/kernel/crypto/sparcv9 755 root sys +s none platform/SUNW,Sun-Fire-V445/kernel/crypto/sparcv9/aes256=../../../../sun4u-us3/kernel/crypto/sparcv9/aes256 +d none platform/SUNW,Sun-Fire-V215/kernel 755 root sys +d none platform/SUNW,Sun-Fire-V215/kernel/crypto 755 root sys +d none platform/SUNW,Sun-Fire-V215/kernel/crypto/sparcv9 755 root sys +s none platform/SUNW,Sun-Fire-V215/kernel/crypto/sparcv9/aes256=../../../../sun4u-us3/kernel/crypto/sparcv9/aes256 d none platform/SUNW,Netra-CP3010/kernel 755 root sys d none platform/SUNW,Netra-CP3010/kernel/crypto 755 root sys d none platform/SUNW,Netra-CP3010/kernel/crypto/sparcv9 755 root sys
--- a/usr/src/pkgdefs/SUNWhea/prototype_sparc Mon Nov 14 22:42:12 2005 -0800 +++ b/usr/src/pkgdefs/SUNWhea/prototype_sparc Mon Nov 14 22:43:41 2005 -0800 @@ -133,6 +133,10 @@ s none usr/platform/SUNW,Sun-Blade-2500/include=../sun4u/include d none usr/platform/SUNW,A70 755 root sys s none usr/platform/SUNW,A70/include=../sun4u/include +d none usr/platform/SUNW,Sun-Fire-V445 755 root sys +s none usr/platform/SUNW,Sun-Fire-V445/include=../sun4u/include +d none usr/platform/SUNW,Sun-Fire-V215 755 root sys +s none usr/platform/SUNW,Sun-Fire-V215/include=../sun4u/include d none usr/platform/SUNW,Sun-Fire 755 root sys s none usr/platform/SUNW,Sun-Fire/include=../sun4u/include d none usr/platform/SUNW,Sun-Fire-V240 755 root sys
--- a/usr/src/pkgdefs/SUNWkvm.u/prototype_com Mon Nov 14 22:42:12 2005 -0800 +++ b/usr/src/pkgdefs/SUNWkvm.u/prototype_com Mon Nov 14 22:43:41 2005 -0800 @@ -60,6 +60,8 @@ d none usr/platform/SUNW,Sun-Blade-1500 755 root sys d none usr/platform/SUNW,Sun-Blade-2500 755 root sys d none usr/platform/SUNW,A70 755 root sys +d none usr/platform/SUNW,Sun-Fire-V445 755 root sys +d none usr/platform/SUNW,Sun-Fire-V215 755 root sys d none usr/platform/SUNW,Sun-Fire 755 root sys d none usr/platform/SUNW,Sun-Fire-V240 755 root sys d none usr/platform/SUNW,Sun-Fire-V250 755 root sys @@ -93,6 +95,14 @@ s none usr/platform/SUNW,Sun-Blade-1500/sbin=../sun4u/sbin s none usr/platform/SUNW,Sun-Blade-2500/sbin=../sun4u/sbin s none usr/platform/SUNW,A70/sbin=../sun4u/sbin +d none usr/platform/SUNW,Sun-Fire-V445/sbin 755 root bin +s none usr/platform/SUNW,Sun-Fire-V445/sbin/eeprom=../../sun4u/sbin/eeprom +s none usr/platform/SUNW,Sun-Fire-V445/sbin/prtdiag=../../sun4u/sbin/prtdiag +s none usr/platform/SUNW,Sun-Fire-V445/sbin/trapstat=../../sun4u/sbin/trapstat +d none usr/platform/SUNW,Sun-Fire-V215/sbin 755 root bin +s none usr/platform/SUNW,Sun-Fire-V215/sbin/eeprom=../../sun4u/sbin/eeprom +s none usr/platform/SUNW,Sun-Fire-V215/sbin/prtdiag=../../sun4u/sbin/prtdiag +s none usr/platform/SUNW,Sun-Fire-V215/sbin/trapstat=../../sun4u/sbin/trapstat s none usr/platform/SUNW,Sun-Fire/sbin=../sun4u/sbin d none usr/platform/SUNW,Sun-Fire-V240/sbin 755 root bin s none usr/platform/SUNW,Sun-Fire-V240/sbin/eeprom=../../sun4u/sbin/eeprom @@ -164,6 +174,8 @@ d none usr/platform/SUNW,Sun-Blade-1500/lib 755 root bin d none usr/platform/SUNW,Sun-Blade-2500/lib 755 root bin d none usr/platform/SUNW,A70/lib 755 root bin +d none usr/platform/SUNW,Sun-Fire-V445/lib 755 root bin +d none usr/platform/SUNW,Sun-Fire-V215/lib 755 root bin d none usr/platform/SUNW,Sun-Fire/lib 755 root bin d none usr/platform/SUNW,Sun-Fire-V240/lib 755 root bin d none usr/platform/SUNW,Sun-Fire-V250/lib 755 root bin @@ -196,6 +208,8 @@ s none usr/platform/SUNW,Sun-Blade-1500/lib/cfgadm=../../sun4u/lib/cfgadm s none usr/platform/SUNW,Sun-Blade-2500/lib/cfgadm=../../sun4u/lib/cfgadm s none usr/platform/SUNW,A70/lib/cfgadm=../../sun4u/lib/cfgadm +s none usr/platform/SUNW,Sun-Fire-V445/lib/cfgadm=../../sun4u/lib/cfgadm +s none usr/platform/SUNW,Sun-Fire-V215/lib/cfgadm=../../sun4u/lib/cfgadm s none usr/platform/SUNW,Sun-Fire/lib/cfgadm=../../sun4u/lib/cfgadm s none usr/platform/SUNW,Sun-Fire-V240/lib/cfgadm=../../sun4u/lib/cfgadm s none usr/platform/SUNW,Sun-Fire-V250/lib/cfgadm=../../sun4u/lib/cfgadm @@ -235,6 +249,8 @@ s none usr/platform/SUNW,Sun-Blade-1500/lib/fs=../../sun4u/lib/fs s none usr/platform/SUNW,Sun-Blade-2500/lib/fs=../../sun4u/lib/fs s none usr/platform/SUNW,A70/lib/fs=../../sun4u/lib/fs +s none usr/platform/SUNW,Sun-Fire-V445/lib/fs=../../sun4u/lib/fs +s none usr/platform/SUNW,Sun-Fire-V215/lib/fs=../../sun4u/lib/fs s none usr/platform/SUNW,Sun-Fire/lib/fs=../../sun4u/lib/fs s none usr/platform/SUNW,Sun-Fire-V240/lib/fs=../../sun4u/lib/fs s none usr/platform/SUNW,Sun-Fire-V250/lib/fs=../../sun4u/lib/fs @@ -275,6 +291,10 @@ s none usr/platform/SUNW,Netra-240=SUNW,Sun-Fire-V240 s none usr/platform/SUNW,Netra-210=SUNW,Sun-Fire-V240 # +# make the link for Sun-Fire-V245 from Sun-Fire-V215 +# +s none usr/platform/SUNW,Sun-Fire-V245=SUNW,Sun-Fire-V215 +# # system controller administration code # f none usr/platform/SUNW,Sun-Fire-V240/sbin/scadm 2755 root sys @@ -288,6 +308,14 @@ s none usr/platform/SUNW,Sun-Fire-V440/lib/librsc.so.1=../../SUNW,Sun-Fire-V240/lib/librsc.so.1 s none usr/platform/SUNW,Sun-Fire-V440/lib/librsc.so=../../SUNW,Sun-Fire-V240/lib/librsc.so s none usr/platform/SUNW,Sun-Fire-V440/lib/llib-lrsc.ln=../../SUNW,Sun-Fire-V240/lib/llib-lrsc.ln +s none usr/platform/SUNW,Sun-Fire-V445/sbin/scadm=../../SUNW,Sun-Fire-V240/sbin/scadm +s none usr/platform/SUNW,Sun-Fire-V445/lib/llib-lrsc.ln=../../SUNW,Sun-Fire-V240/lib/llib-lrsc.ln +s none usr/platform/SUNW,Sun-Fire-V445/lib/librsc.so.1=../../SUNW,Sun-Fire-V240/lib/librsc.so.1 +s none usr/platform/SUNW,Sun-Fire-V445/lib/librsc.so=../../SUNW,Sun-Fire-V240/lib/librsc.so +s none usr/platform/SUNW,Sun-Fire-V215/sbin/scadm=../../SUNW,Sun-Fire-V240/sbin/scadm +s none usr/platform/SUNW,Sun-Fire-V215/lib/llib-lrsc.ln=../../SUNW,Sun-Fire-V240/lib/llib-lrsc.ln +s none usr/platform/SUNW,Sun-Fire-V215/lib/librsc.so.1=../../SUNW,Sun-Fire-V240/lib/librsc.so.1 +s none usr/platform/SUNW,Sun-Fire-V215/lib/librsc.so=../../SUNW,Sun-Fire-V240/lib/librsc.so # # make link for Netra-440 from Sun-Fire-V440, basically the same hardware in # a different case
--- a/usr/src/pkgdefs/SUNWpiclu/prototype_sparc Mon Nov 14 22:42:12 2005 -0800 +++ b/usr/src/pkgdefs/SUNWpiclu/prototype_sparc Mon Nov 14 22:43:41 2005 -0800 @@ -111,6 +111,12 @@ s none usr/platform/SUNW,A70/lib/picl/plugins/libpiclenvd.so=./libpiclenvd.so.1 755 root sys f none usr/platform/SUNW,A70/lib/picl/plugins/envmodel.conf 644 root sys f none usr/platform/SUNW,A70/lib/picl/plugins/piclfrutree.conf 644 root sys +d none usr/platform/SUNW,Sun-Fire-V445 755 root sys +d none usr/platform/SUNW,Sun-Fire-V445/lib 755 root bin +s none usr/platform/SUNW,Sun-Fire-V445/lib/libprtdiag_psr.so.1=../../SUNW,Sun-Blade-100/lib/libprtdiag_psr.so.1 +d none usr/platform/SUNW,Sun-Fire-V215 755 root sys +d none usr/platform/SUNW,Sun-Fire-V215/lib 755 root bin +s none usr/platform/SUNW,Sun-Fire-V215/lib/libprtdiag_psr.so.1=../../SUNW,Sun-Blade-100/lib/libprtdiag_psr.so.1 f none usr/platform/SUNW,Sun-Blade-100/lib/libprtdiag_psr.so.1 644 root bin s none usr/platform/SUNW,Sun-Blade-1000/lib/libprtdiag_psr.so.1=../../SUNW,Sun-Blade-100/lib/libprtdiag_psr.so.1 f none usr/platform/SUNW,Netra-T12/lib/libprtdiag_psr.so.1 644 root bin
--- a/usr/src/pkgdefs/SUNWpstl.u/prototype_sparc Mon Nov 14 22:42:12 2005 -0800 +++ b/usr/src/pkgdefs/SUNWpstl.u/prototype_sparc Mon Nov 14 22:43:41 2005 -0800 @@ -58,6 +58,8 @@ d none usr/platform/SUNW,Sun-Blade-1500 755 root sys d none usr/platform/SUNW,Sun-Blade-2500 755 root sys d none usr/platform/SUNW,A70 755 root sys +d none usr/platform/SUNW,Sun-Fire-V445 755 root sys +d none usr/platform/SUNW,Sun-Fire-V215 755 root sys d none usr/platform/SUNW,Sun-Fire 755 root sys d none usr/platform/SUNW,Sun-Fire-V240 755 root sys d none usr/platform/SUNW,Sun-Fire-V250 755 root sys @@ -89,6 +91,8 @@ d none usr/platform/SUNW,Sun-Blade-1500/lib 755 root bin d none usr/platform/SUNW,Sun-Blade-2500/lib 755 root bin d none usr/platform/SUNW,A70/lib 755 root bin +d none usr/platform/SUNW,Sun-Fire-V445/lib 755 root bin +d none usr/platform/SUNW,Sun-Fire-V215/lib 755 root bin d none usr/platform/SUNW,Sun-Fire/lib 755 root bin d none usr/platform/SUNW,Sun-Fire-V240/lib 755 root bin d none usr/platform/SUNW,Sun-Fire-V250/lib 755 root bin
--- a/usr/src/psm/stand/boot/sparcv9/sun4u/Makefile Mon Nov 14 22:42:12 2005 -0800 +++ b/usr/src/psm/stand/boot/sparcv9/sun4u/Makefile Mon Nov 14 22:43:41 2005 -0800 @@ -45,6 +45,8 @@ PLATLINKS += SUNW,Sun-Blade-1500 PLATLINKS += SUNW,Sun-Blade-2500 PLATLINKS += SUNW,A70 +PLATLINKS += SUNW,Sun-Fire-V445 +PLATLINKS += SUNW,Sun-Fire-V215 PLATLINKS += SUNW,Sun-Fire PLATLINKS += SUNW,Sun-Fire-V240 PLATLINKS += SUNW,Sun-Fire-V250
--- a/usr/src/uts/common/io/power.c Mon Nov 14 22:42:12 2005 -0800 +++ b/usr/src/uts/common/io/power.c Mon Nov 14 22:43:41 2005 -0800 @@ -1,3 +1,4 @@ + /* * CDDL HEADER START * @@ -59,9 +60,29 @@ #include <sys/stat.h> #include <sys/poll.h> #include <sys/pbio.h> + #ifdef ACPI_POWER_BUTTON + #include <sys/acpi/acpi.h> #include <sys/acpica.h> + +#else + +#include <sys/epic.h> +/* + * Some #defs that must be here as they differ for power.c + * and epic.c + */ +#define EPIC_REGS_OFFSET 0x00 +#define EPIC_REGS_LEN 0x82 + + +/* + * This flag, which is set for platforms, that have EPIC processor + * to process power button interrupt, helps in executing platform + * specific code. + */ +static char hasEPIC = B_FALSE; #endif /* ACPI_POWER_BUTTON */ /* @@ -390,6 +411,7 @@ DDI_FAILURE); } + #ifndef ACPI_POWER_BUTTON /* * Handler for the high-level interrupt. @@ -408,17 +430,39 @@ if (softsp->power_regs_mapped) { mutex_enter(&softsp->power_intr_mutex); - reg = ddi_get8(hdl, softsp->power_btn_reg); - if (reg & softsp->power_btn_bit) { - reg &= softsp->power_btn_bit; - ddi_put8(hdl, softsp->power_btn_reg, reg); - (void) ddi_get8(hdl, softsp->power_btn_reg); + + /* Check if power button interrupt is delivered by EPIC HW */ + if (hasEPIC) { + /* read isr - first issue command */ + EPIC_WR(hdl, softsp->power_btn_reg, + EPIC_ATOM_INTR_READ); + /* next, read the reg */ + EPIC_RD(hdl, softsp->power_btn_reg, reg); + + if (reg & EPIC_FIRE_INTERRUPT) { /* PB pressed */ + /* clear the interrupt */ + EPIC_WR(hdl, softsp->power_btn_reg, + EPIC_ATOM_INTR_CLEAR); + } else { + if (!softsp->power_btn_ioctl) { + mutex_exit(&softsp->power_intr_mutex); + return (DDI_INTR_CLAIMED); + } + softsp->power_btn_ioctl = B_FALSE; + } } else { - if (!softsp->power_btn_ioctl) { - mutex_exit(&softsp->power_intr_mutex); - return (DDI_INTR_CLAIMED); + reg = ddi_get8(hdl, softsp->power_btn_reg); + if (reg & softsp->power_btn_bit) { + reg &= softsp->power_btn_bit; + ddi_put8(hdl, softsp->power_btn_reg, reg); + (void) ddi_get8(hdl, softsp->power_btn_reg); + } else { + if (!softsp->power_btn_ioctl) { + mutex_exit(&softsp->power_intr_mutex); + return (DDI_INTR_CLAIMED); + } + softsp->power_btn_ioctl = B_FALSE; } - softsp->power_btn_ioctl = B_FALSE; } mutex_exit(&softsp->power_intr_mutex); } @@ -1033,6 +1077,44 @@ #else /* + * Code for platforms that have EPIC processor for processing power + * button interrupts. + */ +static int +power_setup_epic_regs(dev_info_t *dip, struct power_soft_state *softsp) +{ + ddi_device_acc_attr_t attr; + uint8_t *reg_base; + + attr.devacc_attr_version = DDI_DEVICE_ATTR_V0; + attr.devacc_attr_endian_flags = DDI_STRUCTURE_LE_ACC; + attr.devacc_attr_dataorder = DDI_STRICTORDER_ACC; + if (ddi_regs_map_setup(dip, 0, (caddr_t *)®_base, + EPIC_REGS_OFFSET, EPIC_REGS_LEN, &attr, + &softsp->power_rhandle) != DDI_SUCCESS) { + return (DDI_FAILURE); + } + + softsp->power_btn_reg = reg_base; + softsp->power_regs_mapped = B_TRUE; + + /* Clear power button interrupt first */ + EPIC_WR(softsp->power_rhandle, softsp->power_btn_reg, + EPIC_ATOM_INTR_CLEAR); + + /* Enable EPIC interrupt for power button single press event */ + EPIC_WR(softsp->power_rhandle, softsp->power_btn_reg, + EPIC_ATOM_INTR_ENABLE); + + /* + * At this point, EPIC interrupt processing is fully initialised. + */ + hasEPIC = B_TRUE; + return (DDI_SUCCESS); +} + +/* + * * power button register definitions for acpi register on m1535d */ #define M1535D_PWR_BTN_REG_01 0x1 @@ -1058,10 +1140,47 @@ } /* + * MBC Fire/SSI Interrupt Status Register definitions + */ +#define FIRE_SSI_ISR 0x0 +#define FIRE_SSI_INTR_ENA 0x8 +#define FIRE_SSI_SHUTDOWN_REQ 0x4 + +static int +power_setup_mbc_regs(dev_info_t *dip, struct power_soft_state *softsp) +{ + ddi_device_acc_attr_t attr; + uint8_t *reg_base; + ddi_acc_handle_t hdl; + uint8_t reg; + + attr.devacc_attr_version = DDI_DEVICE_ATTR_V0; + attr.devacc_attr_endian_flags = DDI_STRUCTURE_LE_ACC; + attr.devacc_attr_dataorder = DDI_STRICTORDER_ACC; + if (ddi_regs_map_setup(dip, 0, (caddr_t *)®_base, 0, 0, &attr, + &softsp->power_rhandle) != DDI_SUCCESS) { + return (DDI_FAILURE); + } + softsp->power_btn_reg = ®_base[FIRE_SSI_ISR]; + softsp->power_btn_bit = FIRE_SSI_SHUTDOWN_REQ; + /* + * Enable MBC Fire Power Button interrupt. + */ + hdl = softsp->power_rhandle; + reg = ddi_get8(hdl, ®_base[FIRE_SSI_INTR_ENA]); + reg |= FIRE_SSI_SHUTDOWN_REQ; + ddi_put8(hdl, ®_base[FIRE_SSI_INTR_ENA], reg); + + softsp->power_regs_mapped = B_TRUE; + + return (DDI_SUCCESS); +} + +/* * Setup register map for the power button * NOTE:- we only map registers for platforms * binding with the ali1535d+-power compatible - * property. + * property or mbc-power or epic property. */ static int power_setup_regs(struct power_soft_state *softsp) @@ -1071,9 +1190,18 @@ softsp->power_regs_mapped = B_FALSE; softsp->power_btn_ioctl = B_FALSE; binding_name = ddi_binding_name(softsp->dip); - if (strcmp(binding_name, "ali1535d+-power") == 0) + if (strcmp(binding_name, "mbc-power") == 0) + return (power_setup_mbc_regs(softsp->dip, softsp)); + else if (strcmp(binding_name, "SUNW,ebus-pic18lf65j10-power") == 0) + return (power_setup_epic_regs(softsp->dip, softsp)); + else if (strcmp(binding_name, "ali1535d+-power") == 0) return (power_setup_m1535_regs(softsp->dip, softsp)); + /* + * If the binding name is not one of these, that means there is no + * additional HW and hence no extra processing is necessary. Just + * return SUCCESS. + */ return (DDI_SUCCESS); }
--- a/usr/src/uts/sparc/os/driver_aliases Mon Nov 14 22:42:12 2005 -0800 +++ b/usr/src/uts/sparc/os/driver_aliases Mon Nov 14 22:43:41 2005 -0800 @@ -53,6 +53,7 @@ m1535ppm "ali1535d+-ppm" upa64s "jbus-upa64s" ics951601 "i2c-ics951601" +adm1026 "i2c-adm1026" adm1031 "i2c-adm1031" jbusppm jbus-ppm upa64s "SUNW,upa64s" @@ -126,6 +127,8 @@ mpt "pci1000,56" mpt "pci1000,58" power "ali1535d+-power" +power "mbc-power" +power "SUNW,ebus-pic18lf65j10-power" ramdisk SUNW,ramdisk dmfe "pci108e,9102" dmfe "pci128h,9102" @@ -153,6 +156,9 @@ ebus "jbus-ebus" pic16f747 "SUNW,ebus-pic16f747-env" qcn "SUNW,sun4v-console" +epic "SUNW,ebus-pic18lf65j10-env" +pmugpio "mbcgpio" +pmugpio "cpldgpio" i8042 "8042" mouse8042 "pnpPNP,f03" kb8042 "pnpPNP,303"
--- a/usr/src/uts/sparc/os/name_to_major Mon Nov 14 22:42:12 2005 -0800 +++ b/usr/src/uts/sparc/os/name_to_major Mon Nov 14 22:43:41 2005 -0800 @@ -205,3 +205,5 @@ kb8042 255 mouse8042 256 kssl 257 +epic 258 +adm1026 259
--- a/usr/src/uts/sun4/sys/platform_module.h Mon Nov 14 22:42:12 2005 -0800 +++ b/usr/src/uts/sun4/sys/platform_module.h Mon Nov 14 22:43:41 2005 -0800 @@ -85,6 +85,7 @@ #pragma weak plat_log_fruid_error2 struct plat_ecc_ch_async_flt; +struct rmc_comm_msg; extern void plat_log_fruid_error2(int msg_type, char *unum, struct async_flt *aflt, struct plat_ecc_ch_async_flt *plat_ecc_ch_flt); @@ -106,12 +107,14 @@ #pragma weak plat_shared_i2c_enter #pragma weak plat_shared_i2c_exit #pragma weak plat_fan_blast +#pragma weak plat_rmc_comm_req extern void plat_setprop_enter(void); extern void plat_setprop_exit(void); extern void plat_shared_i2c_enter(dev_info_t *); extern void plat_shared_i2c_exit(dev_info_t *); extern void plat_fan_blast(void); +extern void plat_rmc_comm_req(struct rmc_comm_msg *); /* * Used to communicate DR updates to platform lgroup framework
--- a/usr/src/uts/sun4u/Makefile.files Mon Nov 14 22:42:12 2005 -0800 +++ b/usr/src/uts/sun4u/Makefile.files Mon Nov 14 22:43:41 2005 -0800 @@ -97,6 +97,7 @@ DB21554_OBJS += db21554.o US_OBJS += us_drv.o POWER_OBJS += power.o +EPIC_OBJS += epic.o GRBEEP_OBJS += grbeep.o ADM1031_OBJS += adm1031.o ICS951601_OBJS += ics951601.o @@ -108,6 +109,7 @@ MI2CV_OBJS += mi2cv.o I2BSC_OBJS += i2bsc.o PCA9556_OBJS += pca9556.o +ADM1026_OBJS += adm1026.o BBC_OBJS += bbc_beep.o TDA8444_OBJS += tda8444.o MAX1617_OBJS += max1617.o
--- a/usr/src/uts/sun4u/Makefile.sun4u Mon Nov 14 22:42:12 2005 -0800 +++ b/usr/src/uts/sun4u/Makefile.sun4u Mon Nov 14 22:43:41 2005 -0800 @@ -100,6 +100,8 @@ IMPLEMENTATIONS += snowbird .WAIT IMPLEMENTATIONS += schumacher .WAIT IMPLEMENTATIONS += blade .WAIT +IMPLEMENTATIONS += boston .WAIT +IMPLEMENTATIONS += seattle .WAIT IMPLEMENTATIONS += chicago @@ -363,6 +365,7 @@ DRV_KMODS += tod DRV_KMODS += sf DRV_KMODS += power +DRV_KMODS += epic DRV_KMODS += fcode DRV_KMODS += grbeep DRV_KMODS += pcf8584 mi2cv i2bsc max1617 seeprom tda8444 pca9556 ics951601 adm1031 @@ -370,6 +373,7 @@ DRV_KMODS += pic16f819 DRV_KMODS += pic16f747 DRV_KMODS += scmi2c +DRV_KMODS += adm1026 DRV_KMODS += us DRV_KMODS += ppm schppm jbusppm m1535ppm DRV_KMODS += mc-us3
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/usr/src/uts/sun4u/adm1026/Makefile Mon Nov 14 22:43:41 2005 -0800 @@ -0,0 +1,121 @@ +# +# CDDL HEADER START +# +# The contents of this file are subject to the terms of the +# Common Development and Distribution License, Version 1.0 only +# (the "License"). You may not use this file except in compliance +# with the License. +# +# You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE +# or http://www.opensolaris.org/os/licensing. +# See the License for the specific language governing permissions +# and limitations under the License. +# +# When distributing Covered Code, include this CDDL HEADER in each +# file and include the License file at usr/src/OPENSOLARIS.LICENSE. +# If applicable, add the following below this CDDL HEADER, with the +# fields enclosed by brackets "[]" replaced with your own identifying +# information: Portions Copyright [yyyy] [name of copyright owner] +# +# CDDL HEADER END +# +# +# Copyright 2005 Sun Microsystems, Inc. All rights reserved. +# Use is subject to license terms. +# +#pragma ident "%Z%%M% %I% %E% SMI" +# +# This makefile drives the production of the adm1026 driver kernel module +# +# sun4u implementation architecture dependent +# + +# +# Path to the base of the uts directory tree (usually /usr/src/uts). +# +UTSBASE = ../.. + +# +# Define the module and object file sets. +# +MODULE = adm1026 +OBJECTS = $(ADM1026_OBJS:%=$(OBJS_DIR)/%) +LINTS = $(ADM1026_OBJS:%.o=$(LINTS_DIR)/%.ln) +ROOTMODULE = $(ROOT_PSM_DRV_DIR)/$(MODULE) + +# +# Include common rules. +# +include $(UTSBASE)/sun4u/Makefile.sun4u + +# +# lint pass one enforcement +# +CFLAGS += $(CCVERBOSE) +LDFLAGS += -dy -N misc/i2c_svc + +# compile time debug flag + + +# +# Define targets +# +ALL_TARGET = $(BINARY) +LINT_TARGET = $(MODULE).lint +INSTALL_TARGET = $(BINARY) $(ROOTMODULE) + +.KEEP_STATE: + + +all: $(ALL_DEPS) + +def: $(DEF_DEPS) + +clean: $(CLEAN_DEPS) + +clobber: $(CLOBBER_DEPS) + +lint: $(LINT_DEPS) + +modlintlib: $(MODLINTLIB_DEPS) + +clean.lint: $(CLEAN_LINT_DEPS) + +install: $(INSTALL_DEPS) + +# Include common targets. +# +include $(UTSBASE)/sun4u/Makefile.targ + +# +# Defines for local commands. +# +WLCC = wlcc +TOUCH = touch +WARLOCK = warlock +SCCS = sccs +TEST = test + + +# +# Warlock targets +# + +ADM1026_FILES = $(ADM1026_OBJS:%.o=%.ll) + +warlock: $(MODULE).ok + +%.wlcmd: + $(TEST) -f $@ || $(SCCS) get $@ + +%.ok: $(ADM1026_FILES) adm1026.wlcmd warlock_ddi.files + $(WARLOCK) -c ./adm1026.wlcmd \ + $(ADM1026_FILES) \ + -l ../../sparc/warlock/ddi_dki_impl.ll + $(TOUCH) $@ + +%.ll: $(UTSBASE)/sun4u/io/i2c/clients/%.c + $(WLCC) $(CPPFLAGS) -DDEBUG -o $@ $< + +warlock_ddi.files: + cd ../../sparc/warlock; pwd; $(MAKE) warlock
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/usr/src/uts/sun4u/boston/Makefile Mon Nov 14 22:43:41 2005 -0800 @@ -0,0 +1,105 @@ +# +# Copyright 2005 Sun Microsystems, Inc. All rights reserved. +# Use is subject to license terms. +# +# ident "%Z%%M% %I% %E% SMI" +# +# uts/sun4u/boston/Makefile +# +# This makefile drives the production of the sun4u boston platform +# module. +# +# sun4u implementation architecture dependent +# + +# +# Path to the base of the uts directory tree (usually /usr/src/uts). +# +UTSBASE = ../.. + +# +# Include common rules. +# +include $(UTSBASE)/sun4u/boston/Makefile.boston + +def := TARGET= def +all := TARGET= all +install := TARGET= install +install_h := TARGET= install_h +clean := TARGET= clean +clobber := TARGET= clobber +lint := TARGET= lint +lintlib := TARGET= lintlib +modlintlib := TARGET= modlintlib +clean.lint := TARGET= clean.lint +check := TARGET= check + +# +# Default build targets. +# +.KEEP_STATE: + +def all clean clean.lint clobber: $(BOSTON_KMODS) + +modlintlib: $(BOSTON_KMODS) + +# EXPORT DELETE START +# +# aes256 is delivered in the SUNWcryr package which is removed from +# the EXPORT_SRC build. +# +BOSTON_CRYPTO_LINKS += aes256 +# EXPORT DELETE END + +install: $(ROOT_BOSTON_DIR) \ + $(USR_BOSTON_DIR) \ + $(USR_BOSTON_INC_DIR) \ + $(USR_BOSTON_SBIN_EEPROM) \ + $(USR_BOSTON_SBIN_PRTDIAG) \ + $(USR_BOSTON_SBIN_TRAPSTAT) \ + $(USR_BOSTON_LIB_DIR) \ + $(BOSTON_CRYPTO_LINKS) \ + .WAIT $(BOSTON_KMODS) + +check install_h: + +lint: modlintlib + +# +# The 'lint.platmod' target lints the boston platform module against the sun4u +# kernel. This ends up doing all the kernel cross-checks, so it takes a couple +# of minutes. Due to the low ROI, it's not run by default, but it's a good +# idea to run this if you change os/boston.c. +# +LINT_LIBS = $(LINT_LIB) \ + -L$(BOSTON_LINT_LIB_DIR) \ + -L$(LINT_LIB_DIR) $(LINT_KMODS:%=-l%) \ + -L$(SPARC_LIB_DIR) $(SPARC_LINTS:%=-l%) + +lint.platmod: modlintlib + @-$(ECHO) "\nBoston Platform-dependent module: global crosschecks:" + @-$(LINT) $(LINTFLAGS) $(LINT_LIBS) 2>&1 | $(LGREP.2) + +$(BOSTON_KMODS): FRC + @cd $@; pwd; $(MAKE) $(TARGET) + +$(BOSTON_CRYPTO_LINKS): $(ROOT_BOSTON_CRYPTO_DIR_64) + -$(RM) $(ROOT_BOSTON_CRYPTO_DIR_64)/$@; + $(SYMLINK) $(ROOT_US3_CRYPTO_LINK)/$@ $(ROOT_BOSTON_CRYPTO_DIR_64)/$@ + +# EXPORT DELETE START + +EXPORT_SRC: + $(RM) Makefile+ + sed -e "/^# EXPORT DELETE START/,/^# EXPORT DELETE END/d" \ + < Makefile > Makefile+ + $(MV) Makefile+ Makefile + $(CHMOD) 444 Makefile + +# EXPORT DELETE END + +# +# +# Include common targets. +# +include $(UTSBASE)/sun4u/boston/Makefile.targ
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/usr/src/uts/sun4u/boston/Makefile.boston Mon Nov 14 22:43:41 2005 -0800 @@ -0,0 +1,62 @@ +# +# Copyright 2005 Sun Microsystems, Inc. All rights reserved. +# Use is subject to license terms. +# +#pragma ident "%Z%%M% %I% %E% SMI" +# +# Global definitions for sun4u implementation specific modules. +# + +# +# Define directories. +# +ROOT_BOSTON_DIR = $(ROOT_PLAT_DIR)/SUNW,Sun-Fire-V445 +ROOT_BOSTON_MOD_DIR = $(ROOT_BOSTON_DIR)/kernel + +ROOT_BOSTON_MISC_DIR_32 = $(ROOT_BOSTON_MOD_DIR)/misc +ROOT_BOSTON_MISC_DIR_64 = $(ROOT_BOSTON_MISC_DIR_32)/$(SUBDIR64) +ROOT_BOSTON_DRV_DIR_32 = $(ROOT_BOSTON_MOD_DIR)/drv +ROOT_BOSTON_DRV_DIR_64 = $(ROOT_BOSTON_DRV_DIR_32)/$(SUBDIR64) +ROOT_BOSTON_CRYPTO_DIR_32 = $(ROOT_BOSTON_MOD_DIR)/crypto +ROOT_BOSTON_CRYPTO_DIR_64 = $(ROOT_BOSTON_CRYPTO_DIR_32)/$(SUBDIR64) + +ROOT_BOSTON_MISC_DIR = $(ROOT_BOSTON_MISC_DIR_$(CLASS)) +ROOT_BOSTON_DRV_DIR = $(ROOT_BOSTON_DRV_DIR_$(CLASS)) +ROOT_BOSTON_CRYPTO_DIR = $(ROOT_BOSTON_CRYPTO_DIR_$(CLASS)) + +ROOT_PLAT_MOD_DIRS += $(ROOT_BOSTON_MOD_DIR) +ROOT_PLAT_MISC_DIRS += $(ROOT_BOSTON_MISC_DIR) + +USR_BOSTON_DIR = $(USR_PLAT_DIR)/SUNW,Sun-Fire-V445 +USR_BOSTON_LINKED_DIR = $(USR_PLAT_DIR)/$(LINKED_PLATFORM) +USR_BOSTON_INC_DIR = $(USR_BOSTON_DIR)/include +USR_BOSTON_ISYS_DIR = $(USR_BOSTON_INC_DIR)/sys +USR_BOSTON_SBIN_DIR = $(USR_BOSTON_DIR)/sbin +USR_BOSTON_SBIN_EEPROM = $(USR_BOSTON_SBIN_DIR)/eeprom +USR_BOSTON_SBIN_PRTDIAG = $(USR_BOSTON_SBIN_DIR)/prtdiag +USR_BOSTON_SBIN_TRAPSTAT = $(USR_BOSTON_SBIN_DIR)/trapstat +USR_BOSTON_LIB_DIR = $(USR_BOSTON_DIR)/lib + +BOSTON_LINT_LIB_DIR= $(UTSBASE)/$(PLATFORM)/boston/lint-libs/$(OBJS_DIR) + +# +# Define objects. +# +BOSTON_OBJS = boston.o + +# +# Define modules. +# +BOSTON_KMODS = platmod + +# +# Links to UltraSparc III crypto modules +# +BOSTON_CRYPTO_LINKS = aes + +include $(UTSBASE)/sun4u/boston/Makefile.files + +# +# Include common rules. +# +include $(UTSBASE)/sun4u/Makefile.sun4u
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/usr/src/uts/sun4u/boston/Makefile.files Mon Nov 14 22:43:41 2005 -0800 @@ -0,0 +1,22 @@ +# +# uts/sun4u/boston/Makefile.files +# Copyright 2005 Sun Microsystems, Inc. All rights reserved. +# Use is subject to license terms. +# +#ident "%Z%%M% %I% %E% SMI" +# +# This Makefile defines all file modules for the directory +# uts/sun4u/boston and it's children. These are the source files +# which are sun4u "implementation architecture" dependent. +# + +# +# object lists +# +# Boston specific driver module +# + +# +# Miscellaneous +# +INC_PATH += -I$(UTSBASE)/sun4u/boston
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/usr/src/uts/sun4u/boston/Makefile.rules Mon Nov 14 22:43:41 2005 -0800 @@ -0,0 +1,33 @@ +# +# Copyright 2005 Sun Microsystems, Inc. All rights reserved. +# Use is subject to license terms. +# +#ident "%Z%%M% %I% %E% SMI" +# + +# +# This Makefile defines the build rules for the directory +# uts/sun4u/boston. +# +# The following two-level ordering must be maintained in this file. +# Lines are sorted first in order of decreasing specificity based on +# the first directory component. That is, sun4u rules come before +# sparc rules come before common rules. +# +# Lines whose initial directory components are equal are sorted +# alphabetically by the remaining components. + +# +# Section 1a: C object build rules +# + +$(OBJS_DIR)/%.o: $(UTSBASE)/sun4u/boston/os/%.c + $(COMPILE.c) -o $@ $< + $(CTFCONVERT_O) + +# +# Section 1b: Lint `object' build rules +# + +$(LINTS_DIR)/%.ln: $(UTSBASE)/sun4u/boston/os/%.c + @($(LHEAD) $(LINT.c) $< $(LTAIL))
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/usr/src/uts/sun4u/boston/Makefile.targ Mon Nov 14 22:43:41 2005 -0800 @@ -0,0 +1,77 @@ +# +# Copyright 2005 Sun Microsystems, Inc. All rights reserved. +# Use is subject to license terms. +# +# ident "%Z%%M% %I% %E% SMI" +# +# Common targets for sun4u implementation specific modules. +# + +.KEEP_STATE: + +IMPLEMENTED_PLATFORM = SUNW,Sun-Fire-V445 +# +# Rules for implementation subdirectories. +# +$(ROOT_BOSTON_DIR): $(ROOT_PLAT_DIR) + -$(INS.dir.root.sys) + +$(ROOT_BOSTON_MOD_DIR): $(ROOT_BOSTON_DIR) + -$(INS.dir.root.sys) + +$(ROOT_BOSTON_MISC_DIR_32): $(ROOT_BOSTON_MOD_DIR) + -$(INS.dir.root.sys) + +$(ROOT_BOSTON_MISC_DIR_64): $(ROOT_BOSTON_MISC_DIR_32) + -$(INS.dir.root.sys) + +$(ROOT_BOSTON_DRV_DIR_32): $(ROOT_BOSTON_MOD_DIR) + -$(INS.dir.root.sys) + +$(ROOT_BOSTON_DRV_DIR_64): $(ROOT_BOSTON_DRV_DIR_32) + -$(INS.dir.root.sys) + +$(ROOT_BOSTON_CRYPTO_DIR_32): $(ROOT_BOSTON_MOD_DIR) + -$(INS.dir.root.sys) + +$(ROOT_BOSTON_CRYPTO_DIR_64): $(ROOT_BOSTON_CRYPTO_DIR_32) + -$(INS.dir.root.sys) + +$(USR_BOSTON_DIR): $(USR_PLAT_DIR) + -$(INS.dir.root.sys) + +$(USR_BOSTON_INC_DIR): $(USR_BOSTON_DIR) + -$(INS.slink4) + +$(USR_BOSTON_SBIN_DIR): $(USR_BOSTON_DIR) + $(INS.dir.root.bin) + +$(USR_BOSTON_SBIN_EEPROM): $(USR_BOSTON_SBIN_DIR) + $(RM) -r $@; $(SYMLINK) ../../$(PLATFORM)/sbin/eeprom $@ $(CHOWNLINK) $(CHGRPLINK) + +$(USR_BOSTON_SBIN_PRTDIAG): $(USR_BOSTON_SBIN_DIR) + $(RM) -r $@; $(SYMLINK) ../../$(PLATFORM)/sbin/prtdiag $@ $(CHOWNLINK) $(CHGRPLINK) + +$(USR_BOSTON_SBIN_TRAPSTAT): $(USR_BOSTON_SBIN_DIR) + $(RM) -r $@; $(SYMLINK) ../../$(PLATFORM)/sbin/trapstat $@ $(CHOWNLINK) $(CHGRPLINK) + +$(USR_BOSTON_LIB_DIR): $(USR_BOSTON_DIR) + -$(INS.dir.root.bin) + +$(USR_BOSTON_ISYS_DIR): $(USR_BOSTON_INC_DIR) + $(INS.dir.root.bin) + +$(ROOT_BOSTON_MOD_DIR)/%: $(OBJS_DIR)/% $(ROOT_BOSTON_MOD_DIR) + $(INS.file) + +$(ROOT_BOSTON_MISC_DIR)/%: $(OBJS_DIR)/% $(ROOT_BOSTON_MISC_DIR) + $(INS.file) + +$(ROOT_BOSTON_DRV_DIR)/%: $(OBJS_DIR)/% $(ROOT_BOSTON_DRV_DIR) + $(INS.file) + +# +# Include common targets. +# +include $(UTSBASE)/sun4u/boston/Makefile.rules +include $(UTSBASE)/sun4u/Makefile.targ
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/usr/src/uts/sun4u/boston/os/boston.c Mon Nov 14 22:43:41 2005 -0800 @@ -0,0 +1,580 @@ +/* + * Copyright 2005 Sun Microsystems, Inc. All rights reserved. + * Use is subject to license terms. + */ + +#pragma ident "%Z%%M% %I% %E% SMI" + +#include <sys/param.h> +#include <sys/systm.h> +#include <sys/sysmacros.h> +#include <sys/sunddi.h> +#include <sys/esunddi.h> + +#include <sys/platform_module.h> +#include <sys/errno.h> +#include <sys/cpu_sgnblk_defs.h> +#include <sys/rmc_comm_dp.h> +#include <sys/rmc_comm_drvintf.h> +#include <sys/modctl.h> +#include <sys/lgrp.h> +#include <sys/memnode.h> +#include <sys/promif.h> + +#define SHARED_MI2CV_PATH "/i2c@1f,520000" +static dev_info_t *shared_mi2cv_dip; +static kmutex_t mi2cv_mutex; + +int (*p2get_mem_unum)(int, uint64_t, char *, int, int *); +static void cpu_sgn_update(ushort_t, uchar_t, uchar_t, int); +int (*rmc_req_now)(rmc_comm_msg_t *, uint8_t) = NULL; + +void +startup_platform(void) +{ + mutex_init(&mi2cv_mutex, NULL, NULL, NULL); +} + +int +set_platform_tsb_spares() +{ + return (0); +} + +void +set_platform_defaults(void) +{ + extern char *tod_module_name; + /* Set appropriate tod module */ + if (tod_module_name == NULL) + tod_module_name = "todm5823"; + + cpu_sgn_func = cpu_sgn_update; +} + +/* + * Definitions for accessing the pci config space of the isa node + * of Southbridge. + */ +static ddi_acc_handle_t isa_handle = NULL; /* handle for isa pci space */ + +/* + * Definition for accessing rmclomv + */ +#define RMCLOMV_PATHNAME "/pseudo/rmclomv@0" + +void +load_platform_drivers(void) +{ + /* + * It is OK to return error because 'us' driver is not available + * in all clusters (e.g. missing in Core cluster). + */ + (void) i_ddi_attach_hw_nodes("us"); + + + /* + * mc-us3i must stay loaded for plat_get_mem_unum() + */ + if (i_ddi_attach_hw_nodes("mc-us3i") != DDI_SUCCESS) + cmn_err(CE_WARN, "mc-us3i driver failed to install"); + (void) ddi_hold_driver(ddi_name_to_major("mc-us3i")); + + /* + * load the power button driver + */ + if (i_ddi_attach_hw_nodes("power") != DDI_SUCCESS) + cmn_err(CE_WARN, "power button driver failed to install"); + (void) ddi_hold_driver(ddi_name_to_major("power")); + + /* + * load the GPIO driver for the ALOM reset and watchdog lines + */ + if (i_ddi_attach_hw_nodes("pmugpio") != DDI_SUCCESS) + cmn_err(CE_WARN, "pmugpio failed to install"); + else { + extern int watchdog_enable, watchdog_available; + extern int disable_watchdog_on_exit; + + /* + * Disable an active h/w watchdog timer upon exit to OBP. + */ + disable_watchdog_on_exit = 1; + + watchdog_enable = 1; + watchdog_available = 1; + } + (void) ddi_hold_driver(ddi_name_to_major("pmugpio")); + + /* + * Figure out which mi2cv dip is shared with OBP for the nvram + * device, so the lock can be acquired. + */ + shared_mi2cv_dip = e_ddi_hold_devi_by_path(SHARED_MI2CV_PATH, 0); + + /* + * Load the environmentals driver (rmclomv) + * + * We need this driver to handle events from the RMC when state + * changes occur in the environmental data. + */ + if (i_ddi_attach_hw_nodes("rmc_comm") != DDI_SUCCESS) { + cmn_err(CE_WARN, "rmc_comm failed to install"); + } else { + (void) ddi_hold_driver(ddi_name_to_major("rmc_comm")); + + if (e_ddi_hold_devi_by_path(RMCLOMV_PATHNAME, 0) == NULL) { + cmn_err(CE_WARN, "Could not install rmclomv driver\n"); + } + } + /* + * create a handle to the rmc_comm_request_nowait() function + * inside the rmc_comm module. + * + * The Seattle/Boston todm5823 driver will use this handle to + * use the rmc_comm_request_nowait() function to send time/date + * updates to ALOM. + */ + rmc_req_now = (int (*)(rmc_comm_msg_t *, uint8_t)) + modgetsymvalue("rmc_comm_request_nowait", 0); +} + +/* + * This routine is needed if a device error or timeout occurs before the + * driver is loaded. + */ +/*ARGSUSED*/ +int +plat_ide_chipreset(dev_info_t *dip, int chno) +{ + int ret = DDI_SUCCESS; + + if (isa_handle == NULL) { + return (DDI_FAILURE); + } + + /* + * This will be filled in with the reset logic + * for the ULI1573 when that becomes available. + * currently this is just a stub. + */ + return (ret); +} + + +/*ARGSUSED*/ +int +plat_cpu_poweron(struct cpu *cp) +{ + return (ENOTSUP); /* not supported on this platform */ +} + +/*ARGSUSED*/ +int +plat_cpu_poweroff(struct cpu *cp) +{ + return (ENOTSUP); /* not supported on this platform */ +} + +/*ARGSUSED*/ +void +plat_freelist_process(int mnode) +{ +} + +char *platform_module_list[] = { + "mi2cv", + "pca9556", + (char *)0 +}; + +/*ARGSUSED*/ +void +plat_tod_fault(enum tod_fault_type tod_bad) +{ +} + +/*ARGSUSED*/ +int +plat_get_mem_unum(int synd_code, uint64_t flt_addr, int flt_bus_id, + int flt_in_memory, ushort_t flt_status, char *buf, int buflen, int *lenp) +{ + if (flt_in_memory && (p2get_mem_unum != NULL)) + return (p2get_mem_unum(synd_code, P2ALIGN(flt_addr, 8), + buf, buflen, lenp)); + else + return (ENOTSUP); +} + +/* + * This platform hook gets called from mc_add_mem_unum_label() in the mc-us3i + * driver giving each platform the opportunity to add platform + * specific label information to the unum for ECC error logging purposes. + */ +/*ARGSUSED*/ +void +plat_add_mem_unum_label(char *unum, int mcid, int bank, int dimm) +{ + char old_unum[UNUM_NAMLEN]; + int printed; + int buflen = UNUM_NAMLEN; + + strcpy(old_unum, unum); + printed = snprintf(unum, buflen, "C%d/P0/B%d", mcid, bank); + buflen -= printed; + unum += printed; + + if (dimm != -1) { + printed = snprintf(unum, buflen, "/D%d", dimm); + buflen -= printed; + unum += printed; + } + + snprintf(unum, buflen, ": %s", old_unum); +} + +/*ARGSUSED*/ +int +plat_get_cpu_unum(int cpuid, char *buf, int buflen, int *lenp) +{ + if (snprintf(buf, buflen, "MB") >= buflen) { + return (ENOSPC); + } else { + *lenp = strlen(buf); + return (0); + } +} + +/* + * Our nodename has been set, pass it along to the RMC. + */ +void +plat_nodename_set(void) +{ + rmc_comm_msg_t req; /* request */ + int (*rmc_req_res)(rmc_comm_msg_t *, rmc_comm_msg_t *, time_t) = NULL; + + /* + * find the symbol for the mailbox routine + */ + rmc_req_res = (int (*)(rmc_comm_msg_t *, rmc_comm_msg_t *, time_t)) + modgetsymvalue("rmc_comm_request_response", 0); + + if (rmc_req_res == NULL) { + return; + } + + /* + * construct the message telling the RMC our nodename + */ + req.msg_type = DP_SET_CPU_NODENAME; + req.msg_len = strlen(utsname.nodename) + 1; + req.msg_bytes = 0; + req.msg_buf = (caddr_t)utsname.nodename; + + /* + * ship it + */ + (void) (rmc_req_res)(&req, NULL, 2000); +} + +sig_state_t current_sgn; + +/* + * cpu signatures - we're only interested in the overall system + * "signature" on this platform - not individual cpu signatures + */ +/*ARGSUSED*/ +static void +cpu_sgn_update(ushort_t sig, uchar_t state, uchar_t sub_state, int cpuid) +{ + dp_cpu_signature_t signature; + rmc_comm_msg_t req; /* request */ + int (*rmc_req_res)(rmc_comm_msg_t *, rmc_comm_msg_t *, time_t) = NULL; + int (*rmc_req_now)(rmc_comm_msg_t *, uint8_t) = NULL; + + + /* + * Differentiate a panic reboot from a non-panic reboot in the + * setting of the substate of the signature. + * + * If the new substate is REBOOT and we're rebooting due to a panic, + * then set the new substate to a special value indicating a panic + * reboot, SIGSUBST_PANIC_REBOOT. + * + * A panic reboot is detected by a current (previous) signature + * state of SIGST_EXIT, and a new signature substate of SIGSUBST_REBOOT. + * The domain signature state SIGST_EXIT is used as the panic flow + * progresses. + * + * At the end of the panic flow, the reboot occurs but we should know + * one that was involuntary, something that may be quite useful to know + * at OBP level. + */ + if (state == SIGST_EXIT && sub_state == SIGSUBST_REBOOT) { + if (current_sgn.state_t.state == SIGST_EXIT && + current_sgn.state_t.sub_state != SIGSUBST_REBOOT) + sub_state = SIGSUBST_PANIC_REBOOT; + } + + /* + * offline and detached states only apply to a specific cpu + * so ignore them. + */ + if (state == SIGST_OFFLINE || state == SIGST_DETACHED) { + return; + } + + current_sgn.signature = CPU_SIG_BLD(sig, state, sub_state); + + /* + * find the symbol for the mailbox routine + */ + rmc_req_res = (int (*)(rmc_comm_msg_t *, rmc_comm_msg_t *, time_t)) + modgetsymvalue("rmc_comm_request_response", 0); + if (rmc_req_res == NULL) { + return; + } + + /* + * find the symbol for the mailbox routine + */ + rmc_req_now = (int (*)(rmc_comm_msg_t *, uint8_t)) + modgetsymvalue("rmc_comm_request_nowait", 0); + if (rmc_req_now == NULL) { + return; + } + + signature.cpu_id = -1; + signature.sig = sig; + signature.states = state; + signature.sub_state = sub_state; + req.msg_type = DP_SET_CPU_SIGNATURE; + req.msg_len = (int)(sizeof (signature)); + req.msg_bytes = 0; + req.msg_buf = (caddr_t)&signature; + + /* + * ship it + * - note that for panic or reboot need to send with nowait/urgent + */ + if (state == SIGST_EXIT && (sub_state == SIGSUBST_HALT || + sub_state == SIGSUBST_REBOOT || sub_state == SIGSUBST_ENVIRON || + sub_state == SIGSUBST_PANIC_REBOOT)) + (void) (rmc_req_now)(&req, RMC_COMM_DREQ_URGENT); + else + (void) (rmc_req_res)(&req, NULL, 2000); +} + +/* + * Fiesta support for lgroups. + * + * On fiesta platform, an lgroup platform handle == CPU id + */ + +/* + * Macro for extracting the CPU number from the CPU id + */ +#define CPUID_TO_LGRP(id) ((id) & 0x7) +#define PLATFORM_MC_SHIFT 36 + +/* + * Return the platform handle for the lgroup containing the given CPU + */ +void * +plat_lgrp_cpu_to_hand(processorid_t id) +{ + return ((void *) CPUID_TO_LGRP(id)); +} + +/* + * Platform specific lgroup initialization + */ +void +plat_lgrp_init(void) +{ + pnode_t curnode; + char tmp_name[MAXSYSNAME]; + int portid; + int cpucnt = 0; + int max_portid = -1; + extern uint32_t lgrp_expand_proc_thresh; + extern uint32_t lgrp_expand_proc_diff; + extern pgcnt_t lgrp_mem_free_thresh; + extern uint32_t lgrp_loadavg_tolerance; + extern uint32_t lgrp_loadavg_max_effect; + extern uint32_t lgrp_load_thresh; + extern lgrp_mem_policy_t lgrp_mem_policy_root; + + /* + * Count the number of CPUs installed to determine if + * NUMA optimization should be enabled or not. + * + * All CPU nodes reside in the root node and have a + * device type "cpu". + */ + curnode = prom_rootnode(); + for (curnode = prom_childnode(curnode); curnode; + curnode = prom_nextnode(curnode)) { + bzero(tmp_name, MAXSYSNAME); + if (prom_getproplen(curnode, OBP_NAME) < MAXSYSNAME) { + if (prom_getprop(curnode, OBP_NAME, + (caddr_t)tmp_name) == -1 || prom_getprop(curnode, + OBP_DEVICETYPE, tmp_name) == -1 || strcmp(tmp_name, + "cpu") != 0) + continue; + + cpucnt++; + if (prom_getprop(curnode, "portid", (caddr_t)&portid) != + -1 && portid > max_portid) + max_portid = portid; + } + } + if (cpucnt <= 1) + max_mem_nodes = 1; + else if (max_portid >= 0 && max_portid < MAX_MEM_NODES) + max_mem_nodes = max_portid + 1; + + /* + * Set tuneables for fiesta architecture + * + * lgrp_expand_proc_thresh is the minimum load on the lgroups + * this process is currently running on before considering + * expanding threads to another lgroup. + * + * lgrp_expand_proc_diff determines how much less the remote lgroup + * must be loaded before expanding to it. + * + * Optimize for memory bandwidth by spreading multi-threaded + * program to different lgroups. + */ + lgrp_expand_proc_thresh = lgrp_loadavg_max_effect - 1; + lgrp_expand_proc_diff = lgrp_loadavg_max_effect / 2; + lgrp_loadavg_tolerance = lgrp_loadavg_max_effect / 2; + lgrp_mem_free_thresh = 1; /* home lgrp must have some memory */ + lgrp_expand_proc_thresh = lgrp_loadavg_max_effect - 1; + lgrp_mem_policy_root = LGRP_MEM_POLICY_NEXT; + lgrp_load_thresh = 0; + + mem_node_pfn_shift = PLATFORM_MC_SHIFT - MMU_PAGESHIFT; +} + +/* + * Return latency between "from" and "to" lgroups + * + * This latency number can only be used for relative comparison + * between lgroups on the running system, cannot be used across platforms, + * and may not reflect the actual latency. It is platform and implementation + * specific, so platform gets to decide its value. It would be nice if the + * number was at least proportional to make comparisons more meaningful though. + * NOTE: The numbers below are supposed to be load latencies for uncached + * memory divided by 10. + */ +int +plat_lgrp_latency(void *from, void *to) +{ + /* + * Return remote latency when there are more than two lgroups + * (root and child) and getting latency between two different + * lgroups or root is involved + */ + if (lgrp_optimizations() && (from != to || from == + (void *) LGRP_DEFAULT_HANDLE || to == (void *) LGRP_DEFAULT_HANDLE)) + return (17); + else + return (12); +} + +int +plat_pfn_to_mem_node(pfn_t pfn) +{ + ASSERT(max_mem_nodes > 1); + return (pfn >> mem_node_pfn_shift); +} + +/* + * Assign memnode to lgroups + */ +void +plat_fill_mc(pnode_t nodeid) +{ + int portid; + + /* + * Memory controller portid == global CPU id + */ + if ((prom_getprop(nodeid, "portid", (caddr_t)&portid) == -1) || + (portid < 0)) + return; + + if (portid < max_mem_nodes) + plat_assign_lgrphand_to_mem_node((lgrp_handle_t)portid, portid); +} + +/* ARGSUSED */ +void +plat_build_mem_nodes(u_longlong_t *list, size_t nelems) +{ + size_t elem; + pfn_t basepfn; + pgcnt_t npgs; + + /* + * Boot install lists are arranged <addr, len>, <addr, len>, ... + */ + for (elem = 0; elem < nelems; elem += 2) { + basepfn = btop(list[elem]); + npgs = btop(list[elem+1]); + mem_node_add_slice(basepfn, basepfn + npgs - 1); + } +} + +/* + * Common locking enter code + */ +void +plat_setprop_enter(void) +{ + mutex_enter(&mi2cv_mutex); +} + +/* + * Common locking exit code + */ +void +plat_setprop_exit(void) +{ + mutex_exit(&mi2cv_mutex); +} + +/* + * Called by mi2cv driver + */ +void +plat_shared_i2c_enter(dev_info_t *i2cnexus_dip) +{ + if (i2cnexus_dip == shared_mi2cv_dip) { + plat_setprop_enter(); + } +} + +/* + * Called by mi2cv driver + */ +void +plat_shared_i2c_exit(dev_info_t *i2cnexus_dip) +{ + if (i2cnexus_dip == shared_mi2cv_dip) { + plat_setprop_exit(); + } +} + +/* + * Called by todm5823 driver + */ +void +plat_rmc_comm_req(struct rmc_comm_msg *request) +{ + if (rmc_req_now) + (void) rmc_req_now(request, 0); +}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/usr/src/uts/sun4u/boston/platmod/Makefile Mon Nov 14 22:43:41 2005 -0800 @@ -0,0 +1,88 @@ +# +# Copyright 2005 Sun Microsystems, Inc. All rights reserved. +# Use is subject to license terms. +# +# ident "%Z%%M% %I% %E% SMI" +# +# uts/sun4u/boston/platmod/Makefile +# +# This makefile drives the production of the sun4u boston platform module. +# +# sun4u implementation architecture dependent +# + +# +# Path to the base of the uts directory tree (usually /usr/src/uts). +# +UTSBASE = ../../.. + +# +# Define the module and object file sets. +# +MODULE = platmod +OBJECTS = $(BOSTON_OBJS:%=$(OBJS_DIR)/%) +LINTS = $(BOSTON_OBJS:%.o=$(LINTS_DIR)/%.ln) +ROOTMODULE = $(ROOT_BOSTON_MISC_DIR)/$(MODULE) + +PLAT_DIR = . +HERE = ../boston/platmod + +# +# Include common rules. +# +include $(UTSBASE)/sun4u/boston/Makefile.boston + +# +# Override defaults +# +CLEANFILES += $(PLATLIB) $(SYM_MOD) + +# +# Define targets +# +ALL_TARGET = $(SYM_MOD) +LINT_TARGET = $(MODULE).lint +INSTALL_TARGET = $(BINARY) $(ROOTMODULE) + +# +# lint pass one enforcement +# +CFLAGS += $(CCVERBOSE) + +# +# Default build targets. +# +.KEEP_STATE: + +def: $(DEF_DEPS) + +all: $(ALL_DEPS) + +clean: $(CLEAN_DEPS) + +clobber: $(CLOBBER_DEPS) + +lint: $(LINT_DEPS) + +modlintlib: $(MODLINTLIB_DEPS) + +clean.lint: $(CLEAN_LINT_DEPS) + +install: $(INSTALL_DEPS) + +check: + +LINT_LIB_DIR = $(BOSTON_LINT_LIB_DIR) + +$(PLATLIB): $(BINARY) + ${LD} -o $(PLATLIB) -G $(BINARY) + +$(SYM_MOD): $(UNIX_O) $(PLATLIB) + @echo "resolving symbols against unix.o" + @(cd $(UNIX_DIR); pwd; \ + PLAT_DIR=$(HERE) SYM_MOD=$(HERE)/$(SYM_MOD) $(MAKE) symcheck) + +# +# Include common targets. +# +include $(UTSBASE)/sun4u/boston/Makefile.targ
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/usr/src/uts/sun4u/epic/Makefile Mon Nov 14 22:43:41 2005 -0800 @@ -0,0 +1,93 @@ +# +# CDDL HEADER START +# +# The contents of this file are subject to the terms of the +# Common Development and Distribution License, Version 1.0 only +# (the "License"). You may not use this file except in compliance +# with the License. +# +# You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE +# or http://www.opensolaris.org/os/licensing. +# See the License for the specific language governing permissions +# and limitations under the License. +# +# When distributing Covered Code, include this CDDL HEADER in each +# file and include the License file at usr/src/OPENSOLARIS.LICENSE. +# If applicable, add the following below this CDDL HEADER, with the +# fields enclosed by brackets "[]" replaced with your own identifying +# information: Portions Copyright [yyyy] [name of copyright owner] +# +# CDDL HEADER END +# +# +# uts/sun4u/epic/Makefile +# Copyright 2005 Sun Microsystems, Inc. All rights reserved. +# Use is subject to license terms. +# +#ident "%Z%%M% %I% %E% SMI" +# +# This makefile drives the production of the epic driver +# +# sun4u implementation architecture dependent +# + +# +# Path to the base of the uts directory tree (usually /usr/src/uts). +# +UTSBASE = ../.. + +# +# Define the module and object file sets. +# +MODULE = epic +OBJECTS = $(EPIC_OBJS:%=$(OBJS_DIR)/%) +LINTS = $(EPIC_OBJS:%.o=$(LINTS_DIR)/%.ln) +ROOTMODULE = $(ROOT_PSM_DRV_DIR)/$(MODULE) + +# +# Include common rules. +# +include $(UTSBASE)/sun4u/Makefile.sun4u + +# +# Define targets +# +ALL_TARGET = $(BINARY) +LINT_TARGET = $(MODULE).lint +INSTALL_TARGET = $(BINARY) $(ROOTMODULE) + +# +# lint pass one enforcement +# +CFLAGS += $(CCVERBOSE) + +# +# Turn on doubleword alignment for 64 bit registers +# +CFLAGS += -dalign + +# +# Default build targets. +# +.KEEP_STATE: + +def: $(DEF_DEPS) + +all: $(ALL_DEPS) + +clean: $(CLEAN_DEPS) + +clobber: $(CLOBBER_DEPS) + +lint: $(LINT_DEPS) + +modlintlib: $(MODLINTLIB_DEPS) + +clean.lint: $(CLEAN_LINT_DEPS) + +install: $(INSTALL_DEPS) + +# +# Include common targets. +# +include $(UTSBASE)/sun4u/Makefile.targ
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/usr/src/uts/sun4u/io/epic.c Mon Nov 14 22:43:41 2005 -0800 @@ -0,0 +1,391 @@ +/* + * CDDL HEADER START + * + * The contents of this file are subject to the terms of the + * Common Development and Distribution License, Version 1.0 only + * (the "License"). You may not use this file except in compliance + * with the License. + * + * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE + * or http://www.opensolaris.org/os/licensing. + * See the License for the specific language governing permissions + * and limitations under the License. + * + * When distributing Covered Code, include this CDDL HEADER in each + * file and include the License file at usr/src/OPENSOLARIS.LICENSE. + * If applicable, add the following below this CDDL HEADER, with the + * fields enclosed by brackets "[]" replaced with your own identifying + * information: Portions Copyright [yyyy] [name of copyright owner] + * + * CDDL HEADER END + */ + +/* + * Copyright 2005 Sun Microsystems, Inc. All rights reserved. + * Use is subject to license terms. + */ + +#pragma ident "%Z%%M% %I% %E% SMI" + +/* + * Driver to control Alert and Power LEDs for the Seattle platform. + * Alert LED is also known as Service (required). + * Power LED is also known as Activity. + */ +#include <sys/types.h> +#include <sys/time.h> +#include <sys/errno.h> +#include <sys/cmn_err.h> +#include <sys/param.h> +#include <sys/modctl.h> +#include <sys/conf.h> +#include <sys/open.h> +#include <sys/stat.h> +#include <sys/clock.h> +#include <sys/ddi.h> +#include <sys/sunddi.h> +#include <sys/file.h> +#include <sys/note.h> +#include <sys/epic.h> + + +/* + * Some #defs that must be here as they differ for power.c + * and epic.c + */ +#define EPIC_REGS_OFFSET 0x00 +#define EPIC_REGS_LEN 0x80 + +#define EPIC_IND_DATA 0x40 +#define EPIC_IND_ADDR 0x41 +#define EPIC_WRITE_MASK 0x80 + +/* dev_ops and cb_ops entry point function declarations */ +static int epic_attach(dev_info_t *, ddi_attach_cmd_t); +static int epic_detach(dev_info_t *, ddi_detach_cmd_t); +static int epic_getinfo(dev_info_t *, ddi_info_cmd_t, void *, void **); +static int epic_open(dev_t *, int, int, cred_t *); +static int epic_close(dev_t, int, int, cred_t *); +static int epic_ioctl(dev_t, int, intptr_t, int, cred_t *, int *); + +struct cb_ops epic_cb_ops = { + epic_open, /* open */ + epic_close, /* close */ + nodev, /* strategy */ + nodev, /* print */ + nodev, /* dump */ + nodev, /* read */ + nodev, /* write */ + epic_ioctl, /* ioctl */ + nodev, /* devmap */ + nodev, /* mmap */ + ddi_segmap, /* segmap */ + nochpoll, /* poll */ + ddi_prop_op, /* cb_prop_op */ + NULL, /* streamtab - for STREAMS drivers */ + D_NEW | D_MP /* driver compatibility flag */ +}; + +static struct dev_ops epic_dev_ops = { + DEVO_REV, /* driver build version */ + 0, /* device reference count */ + epic_getinfo, + nulldev, + nulldev, /* probe */ + epic_attach, + epic_detach, + nulldev, /* reset */ + &epic_cb_ops, + (struct bus_ops *)NULL, + nulldev /* power */ +}; + + +/* + * Soft state + */ +struct epic_softc { + dev_info_t *dip; + kmutex_t mutex; + uint8_t *cmd_reg; + ddi_acc_handle_t cmd_handle; +}; + +#define getsoftc(inst) ((struct epic_softc *)ddi_get_soft_state(statep, \ +(inst))) + +/* module configuration stuff */ +static void *statep; +extern struct mod_ops mod_driverops; + +static struct modldrv modldrv = { + &mod_driverops, + "epic_client driver v%I%", + &epic_dev_ops +}; + +static struct modlinkage modlinkage = { + MODREV_1, + &modldrv, + 0 +}; + +int +_init(void) +{ + int e; + + if ((e = ddi_soft_state_init(&statep, + sizeof (struct epic_softc), 0)) != 0) { + return (e); + } + + if ((e = mod_install(&modlinkage)) != 0) + ddi_soft_state_fini(&statep); + + return (e); +} + +int +_fini(void) +{ + int e; + + if ((e = mod_remove(&modlinkage)) != 0) + return (e); + + ddi_soft_state_fini(&statep); + + return (DDI_SUCCESS); +} + +int +_info(struct modinfo *modinfop) +{ + return (mod_info(&modlinkage, modinfop)); +} + +/*ARGSUSED*/ +static int +epic_getinfo(dev_info_t *dip, ddi_info_cmd_t cmd, void *arg, void **result) +{ + int inst; + int retval = DDI_SUCCESS; + struct epic_softc *softc; + + inst = (getminor((dev_t)arg)); + + switch (cmd) { + case DDI_INFO_DEVT2DEVINFO: + if ((softc = getsoftc(inst)) == NULL) { + *result = (void *)NULL; + retval = DDI_FAILURE; + } else + *result = (void *)softc->dip; + break; + + case DDI_INFO_DEVT2INSTANCE: + *result = (void *)inst; + break; + + default: + retval = DDI_FAILURE; + } + + return (retval); +} + +static int +epic_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) +{ + int inst; + struct epic_softc *softc = NULL; + int minor; + char name[MAXNAMELEN]; + ddi_device_acc_attr_t dev_attr; + int res; + + switch (cmd) { + case DDI_ATTACH: + inst = ddi_get_instance(dip); + (void) sprintf(name, "env-monitor%d", inst); + minor = inst; + if (ddi_create_minor_node(dip, name, S_IFCHR, minor, + DDI_PSEUDO, NULL) == DDI_FAILURE) { + cmn_err(CE_WARN, + "ddi_create_minor_node() failed for inst %d\n", + inst); + return (DDI_FAILURE); + } + + /* Allocate a soft state structure for this instance */ + if (ddi_soft_state_zalloc(statep, inst) != DDI_SUCCESS) { + cmn_err(CE_WARN, " ddi_soft_state_zalloc() failed " + "for inst %d\n", inst); + break; + } + + /* Setup soft state */ + if ((softc = getsoftc(inst)) == NULL) { + break; + } + softc->dip = dip; + mutex_init(&softc->mutex, NULL, MUTEX_DRIVER, NULL); + + /* Setup device attributes */ + dev_attr.devacc_attr_version = DDI_DEVICE_ATTR_V0; + dev_attr.devacc_attr_endian_flags = DDI_STRUCTURE_LE_ACC; + dev_attr.devacc_attr_dataorder = DDI_STRICTORDER_ACC; + + res = ddi_regs_map_setup(dip, 0, (caddr_t *)&softc->cmd_reg, + EPIC_REGS_OFFSET, EPIC_REGS_LEN, &dev_attr, + &softc->cmd_handle); + + if (res != DDI_SUCCESS) { + cmn_err(CE_WARN, "ddi_regs_map_setup() failed\n"); + break; + } + + ddi_report_dev(dip); + + + return (DDI_SUCCESS); + + case DDI_RESUME: + return (DDI_SUCCESS); + + default: + return (DDI_FAILURE); + } + + /* Attach failed */ + /* Free soft state, if allocated. remove minor node if added earlier */ + if (softc) + ddi_soft_state_free(statep, inst); + + ddi_remove_minor_node(dip, NULL); + + return (DDI_FAILURE); +} + +static int +epic_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) +{ + int inst; + struct epic_softc *softc; + + switch (cmd) { + case DDI_DETACH: + inst = ddi_get_instance(dip); + if ((softc = getsoftc(inst)) == NULL) + return (ENXIO); + + (void) ddi_regs_map_free(&softc->cmd_handle); + + + /* Free the soft state and remove minor node added earlier */ + mutex_destroy(&softc->mutex); + ddi_soft_state_free(statep, inst); + ddi_remove_minor_node(dip, NULL); + return (DDI_SUCCESS); + + case DDI_SUSPEND: + return (DDI_SUCCESS); + + default: + return (DDI_FAILURE); + } +} + +/*ARGSUSED*/ +static int +epic_open(dev_t *devp, int flag, int otyp, cred_t *credp) +{ + _NOTE(ARGUNUSED(flag)) + _NOTE(ARGUNUSED(otyp)) + _NOTE(ARGUNUSED(credp)) + + int inst = getminor(*devp); + + return (getsoftc(inst) == NULL ? ENXIO : 0); +} + +/*ARGSUSED*/ +static int +epic_close(dev_t dev, int flag, int otyp, cred_t *credp) +{ + _NOTE(ARGUNUSED(flag)) + _NOTE(ARGUNUSED(otyp)) + _NOTE(ARGUNUSED(credp)) + + int inst = getminor(dev); + + return (getsoftc(inst) == NULL ? ENXIO : 0); +} + +/*ARGSUSED*/ +static int +epic_ioctl(dev_t dev, int cmd, intptr_t arg, int mode, cred_t *credp, +int *rvalp) +{ + _NOTE(ARGUNUSED(credp)) + + int inst; + struct epic_softc *softc; + uint8_t in_command; + + inst = getminor(dev); + if ((softc = getsoftc(inst)) == NULL) + return (ENXIO); + + mutex_enter(&softc->mutex); + + switch (cmd) { + case EPIC_SET_POWER_LED: + EPIC_WRITE(softc->cmd_handle, softc->cmd_reg, + EPIC_IND_LED_STATE0, EPIC_POWER_LED_MASK, + EPIC_POWER_LED_ON); + break; + case EPIC_RESET_POWER_LED: + EPIC_WRITE(softc->cmd_handle, softc->cmd_reg, + EPIC_IND_LED_STATE0, EPIC_POWER_LED_MASK, + EPIC_POWER_LED_OFF); + break; + case EPIC_SB_BL_POWER_LED: + EPIC_WRITE(softc->cmd_handle, softc->cmd_reg, + EPIC_IND_LED_STATE0, EPIC_POWER_LED_MASK, + EPIC_POWER_LED_SB_BLINK); + break; + case EPIC_FAST_BL_POWER_LED: + EPIC_WRITE(softc->cmd_handle, softc->cmd_reg, + EPIC_IND_LED_STATE0, EPIC_POWER_LED_MASK, + EPIC_POWER_LED_FAST_BLINK); + break; + case EPIC_SET_ALERT_LED: + EPIC_WRITE(softc->cmd_handle, softc->cmd_reg, + EPIC_IND_LED_STATE0, EPIC_ALERT_LED_MASK, + EPIC_ALERT_LED_ON); + break; + case EPIC_RESET_ALERT_LED: + EPIC_WRITE(softc->cmd_handle, softc->cmd_reg, + EPIC_IND_LED_STATE0, EPIC_ALERT_LED_MASK, + EPIC_ALERT_LED_OFF); + break; + case EPIC_GET_FW: + EPIC_READ(softc->cmd_handle, softc->cmd_reg, + in_command, EPIC_IND_FW_VERSION); + if (ddi_copyout((void *)(&in_command), (void *)arg, + sizeof (in_command), mode) != DDI_SUCCESS) { + mutex_exit(&softc->mutex); + return (EFAULT); + } + break; + default: + mutex_exit(&softc->mutex); + cmn_err(CE_WARN, "epic: cmd %d is not valid", cmd); + return (EINVAL); + } + + mutex_exit(&softc->mutex); + return (0); +}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/usr/src/uts/sun4u/io/i2c/clients/adm1026.c Mon Nov 14 22:43:41 2005 -0800 @@ -0,0 +1,676 @@ +/* + * CDDL HEADER START + * + * The contents of this file are subject to the terms of the + * Common Development and Distribution License, Version 1.0 only + * (the "License"). You may not use this file except in compliance + * with the License. + * + * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE + * or http://www.opensolaris.org/os/licensing. + * See the License for the specific language governing permissions + * and limitations under the License. + * + * When distributing Covered Code, include this CDDL HEADER in each + * file and include the License file at usr/src/OPENSOLARIS.LICENSE. + * If applicable, add the following below this CDDL HEADER, with the + * fields enclosed by brackets "[]" replaced with your own identifying + * information: Portions Copyright [yyyy] [name of copyright owner] + * + * CDDL HEADER END + */ +/* + * Copyright 2005 Sun Microsystems, Inc. All rights reserved. + * Use is subject to license terms. + */ + +#pragma ident "%Z%%M% %I% %E% SMI" + +#include <sys/stat.h> /* ddi_create_minor_node S_IFCHR */ +#include <sys/modctl.h> /* for modldrv */ +#include <sys/open.h> /* for open params. */ +#include <sys/types.h> +#include <sys/kmem.h> +#include <sys/sunddi.h> +#include <sys/conf.h> /* req. by dev_ops flags MTSAFE etc. */ +#include <sys/ddi.h> +#include <sys/file.h> +#include <sys/note.h> +#include <sys/i2c/clients/i2c_gpio.h> +#include <sys/i2c/clients/adm1026_impl.h> + +/* + * This driver supports the GPIO subset of the full ADM1026 register set. + * The driver is designed to allow modifying and reading the Polarity and + * Direction bits of the ADM1026's 16 GPIO pins via the 4 GPIO Config + * registers. In addition, the driver supports modifying and reading + * the 16 GPIO pins via the 2 GPIO input/output registers. + * + * The 4 GPIO Config registers configure the direction and polarity of + * the 16 GPIO pins. When a Polarity bit is set to 0, the GPIO pin is + * active low, otherwise, it is active high. When a Direction bit is set + * to 0, the GPIO pin configured as an input; otherwise, it is an output. + * + * The 2 GPIO input/output registers (Status Register 5 & 6 ) behave as follows. + * When a GPIO pin is configured as an input, the bit is set when its GPIO + * pin is asserted. When a GPIO pin is configured as an output, the bit + * asserts the GPIO pin. + * + * The commands supported in the ioctl routine are: + * GPIO_GET_OUTPUT -- Read GPIO0-GPIO15 bits in Status Register 5 & 6 + * GPIO_SET_OUTPUT -- Modify GPIO0-GPIO15 bits in Status Register 5 & 6 + * GPIO_GET_POLARITY -- Read GPIO0-GPIO15 Polarity bits in GPIO Config 1-4 + * GPIO_SET_POLARITY -- Modify GPIO0-GPIO15 Polarity bits in GPIO Config 1-4 + * GPIO_GET_CONFIG -- Read GPIO0-GPIO15 Direction bits in GPIO Config 1-4 + * GPIO_SET_CONFIG -- Modify GPIO0-GPIO15 Direction bits in GPIO Config 1-4 + * + * A pointer to the i2c_gpio_t data structure is sent as the third argument + * in the ioctl call. The reg_mask and reg_val members of i2c_gpio_t are + * used to logically represent the 16 GPIO pins, thus only the lower 16 bits + * of each member is used. The reg_mask member identifies the GPIO pin(s) + * that the user wants to read or modify and reg_val has the actual value of + * what the corresponding GPIO pin should be set to. + * + * For example, a reg_mask of 0x8001 indicates that the ioctl should only + * access GPIO15 and GPIO0. + */ + +static void *adm1026soft_statep; + +static int adm1026_do_attach(dev_info_t *); +static int adm1026_do_detach(dev_info_t *); +static int adm1026_do_resume(void); +static int adm1026_do_suspend(void); +static int adm1026_get8(adm1026_unit_t *unitp, uint8_t reg, uint8_t *val); +static int adm1026_put8(adm1026_unit_t *unitp, uint8_t reg, uint8_t val); + +/* + * cb ops (only need ioctl) + */ +static int adm1026_open(dev_t *, int, int, cred_t *); +static int adm1026_close(dev_t, int, int, cred_t *); +static int adm1026_ioctl(dev_t, int, intptr_t, int, cred_t *, int *); + +static struct cb_ops adm1026_cbops = { + adm1026_open, /* open */ + adm1026_close, /* close */ + nodev, /* strategy */ + nodev, /* print */ + nodev, /* dump */ + nodev, /* read */ + nodev, /* write */ + adm1026_ioctl, /* ioctl */ + nodev, /* devmap */ + nodev, /* mmap */ + nodev, /* segmap */ + nochpoll, /* poll */ + ddi_prop_op, /* cb_prop_op */ + NULL, /* streamtab */ + D_NEW | D_MP | D_HOTPLUG, /* Driver compatibility flag */ + CB_REV, /* rev */ + nodev, /* int (*cb_aread)() */ + nodev /* int (*cb_awrite)() */ +}; + +/* + * dev ops + */ +static int adm1026_attach(dev_info_t *dip, ddi_attach_cmd_t cmd); +static int adm1026_detach(dev_info_t *dip, ddi_detach_cmd_t cmd); + +static struct dev_ops adm1026_ops = { + DEVO_REV, + 0, + ddi_getinfo_1to1, + nulldev, + nulldev, + adm1026_attach, + adm1026_detach, + nodev, + &adm1026_cbops, + NULL +}; + +extern struct mod_ops mod_driverops; + +static struct modldrv adm1026_modldrv = { + &mod_driverops, /* type of module - driver */ + "ADM1026 i2c device driver: %I%", + &adm1026_ops +}; + +static struct modlinkage adm1026_modlinkage = { + MODREV_1, + &adm1026_modldrv, + 0 +}; + + +int +_init(void) +{ + int error; + + error = mod_install(&adm1026_modlinkage); + + if (!error) + (void) ddi_soft_state_init(&adm1026soft_statep, + sizeof (struct adm1026_unit), 1); + return (error); +} + +int +_fini(void) +{ + int error; + + error = mod_remove(&adm1026_modlinkage); + if (!error) + ddi_soft_state_fini(&adm1026soft_statep); + + return (error); +} + +int +_info(struct modinfo *modinfop) +{ + return (mod_info(&adm1026_modlinkage, modinfop)); +} + +static int +adm1026_open(dev_t *devp, int flags, int otyp, cred_t *credp) +{ + _NOTE(ARGUNUSED(credp)) + + adm1026_unit_t *unitp; + int instance; + int error = 0; + + instance = getminor(*devp); + + D2CMN_ERR((CE_WARN, "adm1026_open: instance=%d\n", instance)); + + if (instance < 0) { + return (ENXIO); + } + + unitp = (struct adm1026_unit *) + ddi_get_soft_state(adm1026soft_statep, instance); + + if (unitp == NULL) { + return (ENXIO); + } + + if (otyp != OTYP_CHR) { + return (EINVAL); + } + + mutex_enter(&unitp->adm1026_mutex); + + if (flags & FEXCL) { + if (unitp->adm1026_oflag != 0) { + error = EBUSY; + } else { + unitp->adm1026_oflag = FEXCL; + } + } else { + if (unitp->adm1026_oflag == FEXCL) { + error = EBUSY; + } else { + unitp->adm1026_oflag = FOPEN; + } + } + + mutex_exit(&unitp->adm1026_mutex); + + return (error); +} + +static int +adm1026_close(dev_t dev, int flags, int otyp, cred_t *credp) +{ + _NOTE(ARGUNUSED(flags, otyp, credp)) + + adm1026_unit_t *unitp; + int instance; + + instance = getminor(dev); + + D2CMN_ERR((CE_WARN, "adm1026_close: instance=%d\n", instance)); + + if (instance < 0) { + return (ENXIO); + } + + unitp = (struct adm1026_unit *) + ddi_get_soft_state(adm1026soft_statep, instance); + + if (unitp == NULL) { + return (ENXIO); + } + + mutex_enter(&unitp->adm1026_mutex); + + unitp->adm1026_oflag = 0; + + mutex_exit(&unitp->adm1026_mutex); + return (DDI_SUCCESS); +} + +static int +adm1026_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) +{ + D2CMN_ERR((CE_WARN, "adm1026_attach: cmd=%x\n", cmd)); + + switch (cmd) { + case DDI_ATTACH: + return (adm1026_do_attach(dip)); + case DDI_RESUME: + return (adm1026_do_resume()); + default: + return (DDI_FAILURE); + } +} + +static int +adm1026_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) +{ + D2CMN_ERR((CE_WARN, "adm1026_detach: cmd=%x\n", cmd)); + switch (cmd) { + case DDI_DETACH: + return (adm1026_do_detach(dip)); + case DDI_SUSPEND: + return (adm1026_do_suspend()); + default: + return (DDI_FAILURE); + } +} + +static int +adm1026_do_attach(dev_info_t *dip) +{ + adm1026_unit_t *unitp; + int instance; + + instance = ddi_get_instance(dip); + + D2CMN_ERR((CE_WARN, "adm1026_do_attach: instance=%d, dip=%p", + instance, (void *)dip)); + + if (ddi_soft_state_zalloc(adm1026soft_statep, instance) != 0) { + cmn_err(CE_WARN, "%s%d: ddi_soft_state_zalloc() failed", + ddi_get_name(dip), instance); + return (DDI_FAILURE); + } + + unitp = ddi_get_soft_state(adm1026soft_statep, instance); + + if (unitp == NULL) { + cmn_err(CE_WARN, "%s%d: ddi_get_soft_state(), no memory", + ddi_get_name(dip), instance); + return (ENOMEM); + } + + D2CMN_ERR((CE_WARN, "adm1026_do_attach: ddi_create_minor_node")); + if (ddi_create_minor_node(dip, "adm1026", S_IFCHR, instance, + "ddi_i2c:led_control", NULL) == DDI_FAILURE) { + cmn_err(CE_WARN, + "adm1026_do_attach: ddi_create_minor_node failed"); + ddi_soft_state_free(adm1026soft_statep, instance); + + return (DDI_FAILURE); + } + + D2CMN_ERR((CE_WARN, "adm1026_do_attach: i2c_client_register")); + if (i2c_client_register(dip, &unitp->adm1026_hdl) != I2C_SUCCESS) { + ddi_remove_minor_node(dip, NULL); + ddi_soft_state_free(adm1026soft_statep, instance); + cmn_err(CE_WARN, + "adm1026_do_attach: i2c_client_register failed"); + + return (DDI_FAILURE); + } + + mutex_init(&unitp->adm1026_mutex, NULL, MUTEX_DRIVER, NULL); + + D2CMN_ERR((CE_WARN, "adm1026_do_attach: DDI_SUCCESS")); + return (DDI_SUCCESS); +} + +static int +adm1026_do_resume(void) +{ + int ret = DDI_SUCCESS; + + return (ret); +} + +static int +adm1026_do_suspend() +{ + int ret = DDI_SUCCESS; + + return (ret); +} + +static int +adm1026_do_detach(dev_info_t *dip) +{ + adm1026_unit_t *unitp; + int instance; + + instance = ddi_get_instance(dip); + + unitp = ddi_get_soft_state(adm1026soft_statep, instance); + + if (unitp == NULL) { + cmn_err(CE_WARN, + "adm1026_do_detach: ddi_get_soft_state failed"); + return (ENOMEM); + } + + i2c_client_unregister(unitp->adm1026_hdl); + + ddi_remove_minor_node(dip, NULL); + + mutex_destroy(&unitp->adm1026_mutex); + ddi_soft_state_free(adm1026soft_statep, instance); + + return (DDI_SUCCESS); +} + +static int +adm1026_get8(adm1026_unit_t *unitp, uint8_t reg, uint8_t *val) +{ + i2c_transfer_t *i2c_tran_pointer = NULL; + int err = DDI_SUCCESS; + + (void) i2c_transfer_alloc(unitp->adm1026_hdl, &i2c_tran_pointer, + 1, 1, I2C_SLEEP); + if (i2c_tran_pointer == NULL) + return (ENOMEM); + + i2c_tran_pointer->i2c_flags = I2C_WR_RD; + i2c_tran_pointer->i2c_wbuf[0] = (uchar_t)reg; + err = i2c_transfer(unitp->adm1026_hdl, i2c_tran_pointer); + if (err) { + D1CMN_ERR((CE_WARN, + "adm1026_get8: I2C_WR_RD reg=0x%x failed", reg)); + } else { + *val = i2c_tran_pointer->i2c_rbuf[0]; + D1CMN_ERR((CE_WARN, "adm1026_get8: reg=%02x, val=%02x", + reg, *val)); + } + i2c_transfer_free(unitp->adm1026_hdl, i2c_tran_pointer); + + return (err); +} + +static int +adm1026_put8(adm1026_unit_t *unitp, uint8_t reg, uint8_t val) +{ + i2c_transfer_t *i2c_tran_pointer = NULL; + int err = DDI_SUCCESS; + + D1CMN_ERR((CE_WARN, "adm1026_put8: reg=%02x, val=%02x\n", reg, val)); + + (void) i2c_transfer_alloc(unitp->adm1026_hdl, &i2c_tran_pointer, + 2, 0, I2C_SLEEP); + if (i2c_tran_pointer == NULL) + return (ENOMEM); + + i2c_tran_pointer->i2c_flags = I2C_WR; + i2c_tran_pointer->i2c_wbuf[0] = reg; + i2c_tran_pointer->i2c_wbuf[1] = val; + + err = i2c_transfer(unitp->adm1026_hdl, i2c_tran_pointer); + if (err) + D2CMN_ERR((CE_WARN, "adm1026_put8: return=%x", err)); + + i2c_transfer_free(unitp->adm1026_hdl, i2c_tran_pointer); + + return (err); +} + +/* + * adm1026_send8: + * Read the i2c register, apply the mask to contents so that only + * bits in mask affected. Or in value and write it back to the i2c register. + */ +static int +adm1026_send8(adm1026_unit_t *unitp, uint8_t reg, uint8_t reg_val, + uint8_t reg_mask) +{ + uint8_t val = 0; + int err; + + if ((err = adm1026_get8(unitp, reg, &val)) != I2C_SUCCESS) + return (err); + val &= ~reg_mask; + val |= (reg_val & reg_mask); + + return (adm1026_put8(unitp, reg, val)); +} + +/* + * adm1026_set_output: + * The low 16 bits of the mask is a 1:1 mask indicating which of the + * 16 GPIO pin(s) to set. + */ +static int +adm1026_set_output(adm1026_unit_t *unitp, uint32_t val, uint32_t mask) +{ + int err = I2C_SUCCESS; + + if (mask & 0xff) + err = adm1026_send8(unitp, ADM1026_STS_REG5, (uint8_t)val, + (uint8_t)mask); + + if ((err == I2C_SUCCESS) && (mask & 0xff00)) + err = adm1026_send8(unitp, ADM1026_STS_REG6, + (uint8_t)(val >> OUTPUT_SHIFT), + (uint8_t)(mask >> OUTPUT_SHIFT)); + + return (err); +} + +/* + * adm1026_get_output: + * The low 16 bits of the mask is a 1:1 mask indicating which of the + * 16 GPIO pin(s) to get. + */ +static int +adm1026_get_output(adm1026_unit_t *unitp, uint32_t mask, uint32_t *val) +{ + uint8_t reg_val = 0; + int err = I2C_SUCCESS; + + if (mask & 0xff) { + err = adm1026_get8(unitp, ADM1026_STS_REG5, ®_val); + if (err != I2C_SUCCESS) + return (err); + + *val = reg_val; + } + + if (mask & 0xff00) { + err = adm1026_get8(unitp, ADM1026_STS_REG6, ®_val); + if (err != I2C_SUCCESS) + return (err); + + *val |= ((reg_val << OUTPUT_SHIFT) & (mask & 0xff00)); + } + + return (err); +} + +/* + * adm1026_set_config: + * The low 16 bits of the mask is a 1:1 mask indicating which of the + * 16 GPIO pin(s) to set the polarity or direction configuration for. + * Each GPIO pin has 2 bits of configuration - 1 polarity bit and 1 + * direction bit. Traverse the mask 4 bits at a time to determine + * which of the 4 GPIO Config registers to access and apply the value + * based on whether cmd is GPIO_SET_CONFIG (set Direction) or + * GPIO_SET_POLARITY. + */ +static int +adm1026_set_config(adm1026_unit_t *unitp, int cmd, uint32_t val, uint32_t mask) +{ + int i; + uint8_t r; + uint32_t m = mask, v = val; + int err = I2C_SUCCESS; + + for (i = 0, r = ADM1026_GPIO_CFG1; i < BYTES_PER_CONFIG; i++, r++) { + if (m & GPIO_CFG_MASK) { + int j; + uint8_t mm = 0, vv = 0; + uint8_t bit = (cmd == GPIO_SET_CONFIG) ? + DIR_BIT : POLARITY_BIT; + + for (j = 0; j < GPIOS_PER_CFG_BYTE; j++) { + if (m & (1 << j)) { + mm |= (bit << (j * BITSPERCFG)); + } + if (v & (1 << j)) { + vv |= (bit << (j * BITSPERCFG)); + } + } + D2CMN_ERR((CE_WARN, "adm1026_set_config: r=%02x, " + "vv=%02x, mm=%02x, m=%02x", r, vv, mm, m)); + err = adm1026_send8(unitp, r, vv, mm); + if (err != I2C_SUCCESS) + return (err); + } + m >>= GPIOS_PER_CFG_BYTE; + v >>= GPIOS_PER_CFG_BYTE; + } + return (err); +} + +/* + * adm1026_get_config: + * The low 16 bits of the mask is a 1:1 mask indicating which of the + * 16 GPIO pin(s) to get the polarity or direction configuration for. + * Each GPIO pin has 2 bits of configuration - 1 polarity bit and 1 + * direction bit. Traverse the mask 4 bits at a time to determine + * which of the 4 GPIO Config registers to access and build the return + * value based on whether cmd is GPIO_GET_CONFIG (get Direction) or + * GPIO_GET_POLARITY. + */ +static int +adm1026_get_config(adm1026_unit_t *unitp, int cmd, uint32_t mask, uint32_t *val) +{ + int i, j; + uint8_t r; + int err = I2C_SUCCESS; + + *val = 0; + + for (i = 0, r = ADM1026_GPIO_CFG1; i < BYTES_PER_CONFIG; i++, r++) { + if (mask & GPIO_CFG_MASK) { + uint8_t newval = 0, x; + uint8_t bit = (cmd == GPIO_GET_CONFIG) ? + DIR_BIT : POLARITY_BIT; + + err = adm1026_get8(unitp, r, &x); + if (err != I2C_SUCCESS) + return (err); + for (j = 0; j < GPIOS_PER_CFG_BYTE; j++) { + if (mask & (1 << j)) { + if (x & (bit << (j * BITSPERCFG))) + newval |= (1 << j); + } + } + *val |= (newval << (i * GPIOS_PER_CFG_BYTE)); + } else + *val <<= GPIOS_PER_CFG_BYTE; + + mask >>= GPIOS_PER_CFG_BYTE; + } + return (err); +} + +static int +adm1026_ioctl(dev_t dev, int cmd, intptr_t arg, int mode, cred_t *credp, + int *rvalp) +{ + _NOTE(ARGUNUSED(credp, rvalp)) + + adm1026_unit_t *unitp; + int instance; + int err = DDI_SUCCESS; + i2c_gpio_t g_buf; + + instance = getminor(dev); + + D2CMN_ERR((CE_WARN, "adm1026_ioctl: instance=%d, cmd=%x\n", + instance, cmd)); + + unitp = (struct adm1026_unit *) + ddi_get_soft_state(adm1026soft_statep, instance); + + if (unitp == NULL) { + cmn_err(CE_WARN, "adm1026_ioctl: ddi_get_soft_state failed"); + err = ENOMEM; + return (err); + } + + mutex_enter(&unitp->adm1026_mutex); + + if (ddi_copyin((caddr_t)arg, &g_buf, + sizeof (i2c_gpio_t), mode) != DDI_SUCCESS) { + + mutex_exit(&unitp->adm1026_mutex); + return (EFAULT); + } + if (g_buf.reg_mask & 0xffff0000) { + cmn_err(CE_WARN, + "adm1026_ioctl: reg_mask too large. " + "Only bits 15-0 supported"); + mutex_exit(&unitp->adm1026_mutex); + return (EINVAL); + } + switch (cmd) { + case GPIO_SET_OUTPUT: + err = adm1026_set_output(unitp, g_buf.reg_val, g_buf.reg_mask); + break; + + case GPIO_GET_OUTPUT: + err = adm1026_get_output(unitp, g_buf.reg_mask, &g_buf.reg_val); + if (err == DDI_SUCCESS) + err = ddi_copyout(&g_buf, (caddr_t)arg, + sizeof (i2c_gpio_t), mode); + break; + + case GPIO_SET_CONFIG: + case GPIO_SET_POLARITY: + err = adm1026_set_config(unitp, cmd, g_buf.reg_val, + g_buf.reg_mask); + break; + + case GPIO_GET_CONFIG: + case GPIO_GET_POLARITY: + err = adm1026_get_config(unitp, cmd, g_buf.reg_mask, + &g_buf.reg_val); + if (err == DDI_SUCCESS) + err = ddi_copyout(&g_buf, (caddr_t)arg, + sizeof (i2c_gpio_t), mode); + break; + default: + D2CMN_ERR((CE_WARN, + "adm1026_ioctl: Invalid ioctl cmd %x\n", cmd)); + err = EINVAL; + } + mutex_exit(&unitp->adm1026_mutex); + + if (err) { + D2CMN_ERR((CE_WARN, + "adm1026_ioctl: failed, err=%x\n", err)); + if (err == DDI_FAILURE) + err = EIO; + } + + return (err); +}
--- a/usr/src/uts/sun4u/io/pmugpio.c Mon Nov 14 22:42:12 2005 -0800 +++ b/usr/src/uts/sun4u/io/pmugpio.c Mon Nov 14 22:43:41 2005 -0800 @@ -20,7 +20,7 @@ * CDDL HEADER END */ /* - * Copyright 2004 Sun Microsystems, Inc. All rights reserved. + * Copyright 2005 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ @@ -36,6 +36,35 @@ #include <sys/devops.h> /* + * The pmugpio driver supports ALOM GPIO bits for resetSC and + * watchdog heartbeat on all relevant platforms. Historically, + * pmugpio is a leaf off the Chalupa pmubus. In addition to + * this support the pmugpio driver has been modified to support + * Minneapolis/Boston Controller (MBC) FPGA GPIO and Seattle CPLD + * GPIO. + */ + +typedef enum { + PMUGPIO_MBC, /* Boston MBC FPGA GPIO - 8-bit */ + PMUGPIO_CPLD, /* Seattle CPLD GPIO - 8-bit */ + PMUGPIO_OTHER /* Chalupa - 8-bit */ +} pmugpio_access_type_t; + +/* + * CPLD GPIO Register defines. + */ +#define CPLD_RESET_SC 0x01 /* Reset SC */ +#define CPLD_WATCHDOG 0x02 /* Watchdog */ + +#define CPLD_RESET_DELAY 3 /* microsecond delay */ + +/* + * MBC FPGA CSR defines. + */ +#define MBC_PPC_RESET 0x10 /* Reset ALOM */ +#define MBC_WATCHDOG 0x40 /* Watchdog heartbeat bit */ + +/* * Time periods, in nanoseconds */ #define PMUGPIO_TWO_SEC 2000000000LL @@ -48,6 +77,7 @@ uint8_t *pmugpio_watchdog_reg; ddi_acc_handle_t pmugpio_watchdog_reg_handle; hrtime_t hw_last_pat; + pmugpio_access_type_t access_type; } pmugpio_state_t; static void *pmugpio_statep; @@ -241,12 +271,37 @@ /* * fetch current reg value and invert it */ - value = (uint8_t)(0xff ^ - ddi_get8(pmugpio_ptr->pmugpio_watchdog_reg_handle, - pmugpio_ptr->pmugpio_watchdog_reg)); + switch (pmugpio_ptr->access_type) { + case PMUGPIO_CPLD: + value = (CPLD_WATCHDOG ^ + ddi_get8(pmugpio_ptr->pmugpio_watchdog_reg_handle, + pmugpio_ptr->pmugpio_watchdog_reg)); + + ddi_put8(pmugpio_ptr->pmugpio_watchdog_reg_handle, + pmugpio_ptr->pmugpio_watchdog_reg, value); + break; + + case PMUGPIO_MBC: + value = (uint8_t)(MBC_WATCHDOG ^ + ddi_get8(pmugpio_ptr->pmugpio_watchdog_reg_handle, + pmugpio_ptr->pmugpio_watchdog_reg)); - ddi_put8(pmugpio_ptr->pmugpio_watchdog_reg_handle, - pmugpio_ptr->pmugpio_watchdog_reg, value); + ddi_put8(pmugpio_ptr->pmugpio_watchdog_reg_handle, + pmugpio_ptr->pmugpio_watchdog_reg, value); + break; + + case PMUGPIO_OTHER: + value = (uint8_t)(0xff ^ + ddi_get8(pmugpio_ptr->pmugpio_watchdog_reg_handle, + pmugpio_ptr->pmugpio_watchdog_reg)); + + ddi_put8(pmugpio_ptr->pmugpio_watchdog_reg_handle, + pmugpio_ptr->pmugpio_watchdog_reg, value); + break; + + default: + cmn_err(CE_WARN, "pmugpio_watchdog_pat: Invalid type"); + } pmugpio_ptr->hw_last_pat = now; } } @@ -257,6 +312,7 @@ dev_info_t *dip = pmugpio_dip; int instance; pmugpio_state_t *pmugpio_ptr; + uint8_t value; if (dip == NULL) { return; @@ -268,35 +324,102 @@ } /* - * turn all bits on then off again - pmubus nexus will ensure - * that only unmasked bit is affected + * For Chalupa, turn all bits on then off again - pmubus nexus + * will ensure that only unmasked bit is affected. + * For CPLD and MBC, turn just reset bit on, then off. */ - ddi_put8(pmugpio_ptr->pmugpio_reset_reg_handle, - pmugpio_ptr->pmugpio_reset_reg, ~0); - ddi_put8(pmugpio_ptr->pmugpio_reset_reg_handle, - pmugpio_ptr->pmugpio_reset_reg, 0); + switch (pmugpio_ptr->access_type) { + case PMUGPIO_CPLD: + value = ddi_get8(pmugpio_ptr->pmugpio_reset_reg_handle, + pmugpio_ptr->pmugpio_reset_reg); + ddi_put8(pmugpio_ptr->pmugpio_reset_reg_handle, + pmugpio_ptr->pmugpio_reset_reg, (value | CPLD_RESET_SC)); + + drv_usecwait(CPLD_RESET_DELAY); + + ddi_put8(pmugpio_ptr->pmugpio_reset_reg_handle, + pmugpio_ptr->pmugpio_reset_reg, (value & ~CPLD_RESET_SC)); + break; + + case PMUGPIO_MBC: + value = ddi_get8(pmugpio_ptr->pmugpio_reset_reg_handle, + pmugpio_ptr->pmugpio_reset_reg); + ddi_put8(pmugpio_ptr->pmugpio_reset_reg_handle, + pmugpio_ptr->pmugpio_reset_reg, + (value | MBC_PPC_RESET)); + ddi_put8(pmugpio_ptr->pmugpio_reset_reg_handle, + pmugpio_ptr->pmugpio_reset_reg, + (value & ~MBC_PPC_RESET)); + break; + + case PMUGPIO_OTHER: + ddi_put8(pmugpio_ptr->pmugpio_reset_reg_handle, + pmugpio_ptr->pmugpio_reset_reg, ~0); + ddi_put8(pmugpio_ptr->pmugpio_reset_reg_handle, + pmugpio_ptr->pmugpio_reset_reg, 0); + break; + + default: + cmn_err(CE_WARN, "pmugpio_reset: Invalid type"); + } } static int pmugpio_map_regs(dev_info_t *dip, pmugpio_state_t *pmugpio_ptr) { ddi_device_acc_attr_t attr; + char *binding_name; /* The host controller will be little endian */ attr.devacc_attr_version = DDI_DEVICE_ATTR_V0; attr.devacc_attr_endian_flags = DDI_STRUCTURE_LE_ACC; attr.devacc_attr_dataorder = DDI_STRICTORDER_ACC; - if (ddi_regs_map_setup(dip, 1, - (caddr_t *)&pmugpio_ptr->pmugpio_watchdog_reg, 0, 1, &attr, - &pmugpio_ptr->pmugpio_watchdog_reg_handle) != DDI_SUCCESS) { + binding_name = ddi_binding_name(dip); + + /* + * Determine access type. + */ + if (strcmp(binding_name, "mbcgpio") == 0) + pmugpio_ptr->access_type = PMUGPIO_MBC; + else if (strcmp(binding_name, "cpldgpio") == 0) + pmugpio_ptr->access_type = PMUGPIO_CPLD; + else + pmugpio_ptr->access_type = PMUGPIO_OTHER; + + switch (pmugpio_ptr->access_type) { + case PMUGPIO_CPLD: + case PMUGPIO_MBC: + if (ddi_regs_map_setup(dip, 0, + (caddr_t *)&pmugpio_ptr->pmugpio_reset_reg, 0, 1, &attr, + &pmugpio_ptr->pmugpio_reset_reg_handle) != DDI_SUCCESS) + return (DDI_FAILURE); + /* MBC and CPLD have reset and watchdog bits in same reg. */ + pmugpio_ptr->pmugpio_watchdog_reg_handle = + pmugpio_ptr->pmugpio_reset_reg_handle; + pmugpio_ptr->pmugpio_watchdog_reg = + pmugpio_ptr->pmugpio_reset_reg; + break; + + case PMUGPIO_OTHER: + if (ddi_regs_map_setup(dip, 1, + (caddr_t *)&pmugpio_ptr->pmugpio_watchdog_reg, 0, 1, &attr, + &pmugpio_ptr->pmugpio_watchdog_reg_handle) != DDI_SUCCESS) { + return (DDI_FAILURE); + } + if (ddi_regs_map_setup(dip, 0, + (caddr_t *)&pmugpio_ptr->pmugpio_reset_reg, 0, 1, &attr, + &pmugpio_ptr->pmugpio_reset_reg_handle) != DDI_SUCCESS) { + ddi_regs_map_free( + &pmugpio_ptr->pmugpio_watchdog_reg_handle); + return (DDI_FAILURE); + } + break; + + default: + cmn_err(CE_WARN, "pmugpio_map_regs: Invalid type"); return (DDI_FAILURE); } - if (ddi_regs_map_setup(dip, 0, - (caddr_t *)&pmugpio_ptr->pmugpio_reset_reg, 0, 1, &attr, - &pmugpio_ptr->pmugpio_reset_reg_handle) != DDI_SUCCESS) { - ddi_regs_map_free(&pmugpio_ptr->pmugpio_watchdog_reg_handle); - return (DDI_FAILURE); - } + return (DDI_SUCCESS); }
--- a/usr/src/uts/sun4u/io/todm5823.c Mon Nov 14 22:42:12 2005 -0800 +++ b/usr/src/uts/sun4u/io/todm5823.c Mon Nov 14 22:43:41 2005 -0800 @@ -20,14 +20,14 @@ * CDDL HEADER END */ /* - * Copyright 2004 Sun Microsystems, Inc. All rights reserved. + * Copyright 2005 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ #pragma ident "%Z%%M% %I% %E% SMI" /* - * tod driver module for ALI M5823 part + * tod driver module for ALI M5823 and compatible devices */ #include <sys/types.h> @@ -38,11 +38,14 @@ #include <sys/sunddi.h> #include <sys/todm5823.h> +#include <sys/rmc_comm_dp.h> +#include <sys/rmc_comm_drvintf.h> #include <sys/modctl.h> #include <sys/stat.h> #include <sys/clock.h> #include <sys/reboot.h> #include <sys/machsystm.h> +#include <sys/platform_module.h> #if 0 #include <sys/poll.h> #include <sys/pbio.h> @@ -76,7 +79,7 @@ * Module linkage information for the kernel. */ static struct modlmisc modlmisc = { - &mod_miscops, "tod module for ALI M5823" + &mod_miscops, "tod module v%I% for M5823 and compatible devices" }; static struct modlinkage modlinkage = { @@ -156,6 +159,23 @@ ASSERT(MUTEX_HELD(&tod_lock)); + /* + * Set the hw watchdog timer if it's been activated. + * This will toggle the watchdog. + */ + if (watchdog_activated) { + int ret = 0; + ret = tod_ops.tod_set_watchdog_timer(0); + /* + * The empty set_watchdog routine returns a 0. So if a + * coded routine fails we will look for a -1 for a failure. + */ + if (ret == -1) + cmn_err(CE_WARN, "todm5823: failed to set hardware " + "watchdog timer."); + } + + if (!read_rtc(&rtc)) { /* * We could not read from the tod @@ -257,6 +277,8 @@ struct rtc_t rtc; todinfo_t tod = utc_to_tod(ts.tv_sec); int year; + rmc_comm_msg_t request; + dp_set_date_time_t set_time_msg; ASSERT(MUTEX_HELD(&tod_lock)); @@ -274,6 +296,45 @@ rtc.rtc_year, rtc.rtc_dom, rtc.rtc_hrs, rtc.rtc_min, rtc.rtc_sec); write_rtc_time(&rtc); + + if (&plat_rmc_comm_req) { + /* + * We are running on a platform that has ALOM. + * Example: Boston, Seattle. + * + * On these platforms, the RTC value does not persist across + * power cycles. However, ALOM has its own TOD clock that + * is battery backed and *does* hold its value across power + * cycles. + * + * On these platforms, on startup OBP reads ALOM's TOD and + * populates the RTC. However, this means that we need to + * update ALOM's TOD whenever Solaris updates the RTC. + * + * Send ALOM an RMC message telling it about the new time + * value. ALOM will update its own TOD clock with this new + * value. + * + * plat_rmc_comm_req() is a pragma weak function implemented + * in the Boston/Seattle platmod. This function in turn + * calls rmc_comm_request_nowait() in the rmc_comm module. + * On platforms without ALOM, plat_rmc_comm_req() will be + * empty, and this section of code will be skipped. + */ + + set_time_msg.year = year - 1900; + set_time_msg.month = tod.tod_month - 1; + set_time_msg.day = tod.tod_day; + set_time_msg.hour = tod.tod_hour; + set_time_msg.minute = tod.tod_min; + set_time_msg.second = tod.tod_sec; + + request.msg_type = DP_SET_DATE_TIME; + request.msg_len = sizeof (set_time_msg); + request.msg_buf = (caddr_t)&set_time_msg; + + plat_rmc_comm_req(&request); + } } void
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/usr/src/uts/sun4u/seattle/Makefile Mon Nov 14 22:43:41 2005 -0800 @@ -0,0 +1,109 @@ +# +# Copyright 2005 Sun Microsystems, Inc. All rights reserved. +# Use is subject to license terms. +# +# ident "%Z%%M% %I% %E% SMI" +# +# uts/sun4u/seattle/Makefile +# +# This makefile drives the production of the sun4u seattle platform +# module. +# +# sun4u implementation architecture dependent +# + +# +# Path to the base of the uts directory tree (usually /usr/src/uts). +# +UTSBASE = ../.. + +# +# Include common rules. +# +include $(UTSBASE)/sun4u/seattle/Makefile.seattle + +def := TARGET= def +all := TARGET= all +install := TARGET= install +install_h := TARGET= install_h +clean := TARGET= clean +clobber := TARGET= clobber +lint := TARGET= lint +lintlib := TARGET= lintlib +modlintlib := TARGET= modlintlib +clean.lint := TARGET= clean.lint +check := TARGET= check + +# +# Default build targets. +# +.KEEP_STATE: + +def all clean clean.lint clobber: $(SEATTLE_KMODS) + +modlintlib: $(SEATTLE_KMODS) + +LINKED_PLATFORMS = SUNW,Sun-Fire-V245 + +# EXPORT DELETE START +# +# aes256 is delivered in the SUNWcryr package which is removed from +# the EXPORT_SRC build. +# +SEATTLE_CRYPTO_LINKS += aes256 +# EXPORT DELETE END + +install: $(ROOT_SEATTLE_DIR) \ + $(USR_SEATTLE_DIR) \ + $(USR_SEATTLE_INC_DIR) \ + $(USR_SEATTLE_SBIN_EEPROM) \ + $(USR_SEATTLE_SBIN_PRTDIAG) \ + $(USR_SEATTLE_SBIN_TRAPSTAT) \ + $(USR_SEATTLE_LIB_DIR) \ + $(LINKED_PLATFORMS:%=$(USR_PLAT_DIR)/%) \ + $(LINKED_PLATFORMS:%=$(ROOT_PLAT_DIR)/%) \ + $(SEATTLE_CRYPTO_LINKS) \ + .WAIT $(SEATTLE_KMODS) + +check install_h: + +lint: modlintlib + +# +# The 'lint.platmod' target lints the seattle platform module against the sun4u +# kernel. This ends up doing all the kernel cross-checks, so it takes a couple +# of minutes. Due to the low ROI, it's not run by default, but it's a good +# idea to run this if you change os/seattle.c. +# +LINT_LIBS = $(LINT_LIB) \ + -L$(SEATTLE_LINT_LIB_DIR) \ + -L$(LINT_LIB_DIR) $(LINT_KMODS:%=-l%) \ + -L$(SPARC_LIB_DIR) $(SPARC_LINTS:%=-l%) + +lint.platmod: modlintlib + @-$(ECHO) "\nSeattle Platform-dependent module: global crosschecks:" + @-$(LINT) $(LINTFLAGS) $(LINT_LIBS) 2>&1 | $(LGREP.2) + +$(SEATTLE_KMODS): FRC + @cd $@; pwd; $(MAKE) $(TARGET) + +$(SEATTLE_CRYPTO_LINKS): $(ROOT_SEATTLE_CRYPTO_DIR_64) + -$(RM) $(ROOT_SEATTLE_CRYPTO_DIR_64)/$@; + $(SYMLINK) $(ROOT_US3_CRYPTO_LINK)/$@ $(ROOT_SEATTLE_CRYPTO_DIR_64)/$@ + +# EXPORT DELETE START + +EXPORT_SRC: + $(RM) Makefile+ + sed -e "/^# EXPORT DELETE START/,/^# EXPORT DELETE END/d" \ + < Makefile > Makefile+ + $(MV) Makefile+ Makefile + $(CHMOD) 444 Makefile + +# EXPORT DELETE END + +# +# +# Include common targets. +# +include $(UTSBASE)/sun4u/seattle/Makefile.targ
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/usr/src/uts/sun4u/seattle/Makefile.files Mon Nov 14 22:43:41 2005 -0800 @@ -0,0 +1,22 @@ +# +# uts/sun4u/seattle/Makefile.files +# Copyright 2005 Sun Microsystems, Inc. All rights reserved. +# Use is subject to license terms. +# +#ident "%Z%%M% %I% %E% SMI" +# +# This Makefile defines all file modules for the directory +# uts/sun4u/seattle and it's children. These are the source files +# which are sun4u "implementation architecture" dependent. +# + +# +# object lists +# +# Seattle specific driver module +# + +# +# Miscellaneous +# +INC_PATH += -I$(UTSBASE)/sun4u/seattle
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/usr/src/uts/sun4u/seattle/Makefile.rules Mon Nov 14 22:43:41 2005 -0800 @@ -0,0 +1,33 @@ +# +# Copyright 2005 Sun Microsystems, Inc. All rights reserved. +# Use is subject to license terms. +# +#ident "%Z%%M% %I% %E% SMI" +# + +# +# This Makefile defines the build rules for the directory +# uts/sun4u/seattle. +# +# The following two-level ordering must be maintained in this file. +# Lines are sorted first in order of decreasing specificity based on +# the first directory component. That is, sun4u rules come before +# sparc rules come before common rules. +# +# Lines whose initial directory components are equal are sorted +# alphabetically by the remaining components. + +# +# Section 1a: C object build rules +# + +$(OBJS_DIR)/%.o: $(UTSBASE)/sun4u/seattle/os/%.c + $(COMPILE.c) -o $@ $< + $(CTFCONVERT_O) + +# +# Section 1b: Lint `object' build rules +# + +$(LINTS_DIR)/%.ln: $(UTSBASE)/sun4u/seattle/os/%.c + @($(LHEAD) $(LINT.c) $< $(LTAIL))
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/usr/src/uts/sun4u/seattle/Makefile.seattle Mon Nov 14 22:43:41 2005 -0800 @@ -0,0 +1,62 @@ +# +# Copyright 2005 Sun Microsystems, Inc. All rights reserved. +# Use is subject to license terms. +# +#pragma ident "%Z%%M% %I% %E% SMI" +# +# Global definitions for sun4u implementation specific modules. +# + +# +# Define directories. +# +ROOT_SEATTLE_DIR = $(ROOT_PLAT_DIR)/SUNW,Sun-Fire-V215 +ROOT_SEATTLE_MOD_DIR = $(ROOT_SEATTLE_DIR)/kernel + +ROOT_SEATTLE_MISC_DIR_32 = $(ROOT_SEATTLE_MOD_DIR)/misc +ROOT_SEATTLE_MISC_DIR_64 = $(ROOT_SEATTLE_MISC_DIR_32)/$(SUBDIR64) +ROOT_SEATTLE_DRV_DIR_32 = $(ROOT_SEATTLE_MOD_DIR)/drv +ROOT_SEATTLE_DRV_DIR_64 = $(ROOT_SEATTLE_DRV_DIR_32)/$(SUBDIR64) +ROOT_SEATTLE_CRYPTO_DIR_32 = $(ROOT_SEATTLE_MOD_DIR)/crypto +ROOT_SEATTLE_CRYPTO_DIR_64 = $(ROOT_SEATTLE_CRYPTO_DIR_32)/$(SUBDIR64) + +ROOT_SEATTLE_MISC_DIR = $(ROOT_SEATTLE_MISC_DIR_$(CLASS)) +ROOT_SEATTLE_DRV_DIR = $(ROOT_SEATTLE_DRV_DIR_$(CLASS)) +ROOT_SEATTLE_CRYPTO_DIR = $(ROOT_SEATTLE_CRYPTO_DIR_$(CLASS)) + +ROOT_PLAT_MOD_DIRS += $(ROOT_SEATTLE_MOD_DIR) +ROOT_PLAT_MISC_DIRS += $(ROOT_SEATTLE_MISC_DIR) + +USR_SEATTLE_DIR = $(USR_PLAT_DIR)/SUNW,Sun-Fire-V215 +USR_SEATTLE_LINKED_DIR = $(USR_PLAT_DIR)/$(LINKED_PLATFORM) +USR_SEATTLE_INC_DIR = $(USR_SEATTLE_DIR)/include +USR_SEATTLE_ISYS_DIR = $(USR_SEATTLE_INC_DIR)/sys +USR_SEATTLE_SBIN_DIR = $(USR_SEATTLE_DIR)/sbin +USR_SEATTLE_SBIN_EEPROM = $(USR_SEATTLE_SBIN_DIR)/eeprom +USR_SEATTLE_SBIN_PRTDIAG = $(USR_SEATTLE_SBIN_DIR)/prtdiag +USR_SEATTLE_SBIN_TRAPSTAT = $(USR_SEATTLE_SBIN_DIR)/trapstat +USR_SEATTLE_LIB_DIR = $(USR_SEATTLE_DIR)/lib + +SEATTLE_LINT_LIB_DIR= $(UTSBASE)/$(PLATFORM)/seattle/lint-libs/$(OBJS_DIR) + +# +# Define objects. +# +SEATTLE_OBJS = seattle.o + +# +# Define modules. +# +SEATTLE_KMODS = platmod + +# +# Links to UltraSparc III crypto modules +# +SEATTLE_CRYPTO_LINKS = aes + +include $(UTSBASE)/sun4u/seattle/Makefile.files + +# +# Include common rules. +# +include $(UTSBASE)/sun4u/Makefile.sun4u
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/usr/src/uts/sun4u/seattle/Makefile.targ Mon Nov 14 22:43:41 2005 -0800 @@ -0,0 +1,83 @@ +# +# Copyright 2005 Sun Microsystems, Inc. All rights reserved. +# Use is subject to license terms. +# +# ident "%Z%%M% %I% %E% SMI" +# +# Common targets for sun4u implementation specific modules. +# + +.KEEP_STATE: + +IMPLEMENTED_PLATFORM = SUNW,Sun-Fire-V215 +# +# Rules for implementation subdirectories. +# +$(ROOT_SEATTLE_DIR): $(ROOT_PLAT_DIR) + -$(INS.dir.root.sys) + +$(ROOT_SEATTLE_MOD_DIR): $(ROOT_SEATTLE_DIR) + -$(INS.dir.root.sys) + +$(ROOT_SEATTLE_MISC_DIR_32): $(ROOT_SEATTLE_MOD_DIR) + -$(INS.dir.root.sys) + +$(ROOT_SEATTLE_MISC_DIR_64): $(ROOT_SEATTLE_MISC_DIR_32) + -$(INS.dir.root.sys) + +$(ROOT_SEATTLE_DRV_DIR_32): $(ROOT_SEATTLE_MOD_DIR) + -$(INS.dir.root.sys) + +$(ROOT_SEATTLE_DRV_DIR_64): $(ROOT_SEATTLE_DRV_DIR_32) + -$(INS.dir.root.sys) + +$(ROOT_SEATTLE_CRYPTO_DIR_32): $(ROOT_SEATTLE_MOD_DIR) + -$(INS.dir.root.sys) + +$(ROOT_SEATTLE_CRYPTO_DIR_64): $(ROOT_SEATTLE_CRYPTO_DIR_32) + -$(INS.dir.root.sys) + +$(USR_SEATTLE_DIR): $(USR_PLAT_DIR) + -$(INS.dir.root.sys) + +$(USR_SEATTLE_INC_DIR): $(USR_SEATTLE_DIR) + -$(INS.slink4) + +$(USR_SEATTLE_SBIN_DIR): $(USR_SEATTLE_DIR) + $(INS.dir.root.bin) + +$(USR_SEATTLE_SBIN_EEPROM): $(USR_SEATTLE_SBIN_DIR) + $(RM) -r $@; $(SYMLINK) ../../$(PLATFORM)/sbin/eeprom $@ $(CHOWNLINK) $(CHGRPLINK) + +$(USR_SEATTLE_SBIN_PRTDIAG): $(USR_SEATTLE_SBIN_DIR) + $(RM) -r $@; $(SYMLINK) ../../$(PLATFORM)/sbin/prtdiag $@ $(CHOWNLINK) $(CHGRPLINK) + +$(USR_SEATTLE_SBIN_TRAPSTAT): $(USR_SEATTLE_SBIN_DIR) + $(RM) -r $@; $(SYMLINK) ../../$(PLATFORM)/sbin/trapstat $@ $(CHOWNLINK) $(CHGRPLINK) + +$(LINKED_PLATFORMS:%=$(ROOT_PLAT_DIR)/%): $(ROOT_PLAT_DIR) + $(INS.slink3) + +$(LINKED_PLATFORMS:%=$(USR_PLAT_DIR)/%): $(USR_PLAT_DIR) + $(INS.slink3) + +$(USR_SEATTLE_LIB_DIR): $(USR_SEATTLE_DIR) + -$(INS.dir.root.bin) + +$(USR_SEATTLE_ISYS_DIR): $(USR_SEATTLE_INC_DIR) + $(INS.dir.root.bin) + +$(ROOT_SEATTLE_MOD_DIR)/%: $(OBJS_DIR)/% $(ROOT_SEATTLE_MOD_DIR) + $(INS.file) + +$(ROOT_SEATTLE_MISC_DIR)/%: $(OBJS_DIR)/% $(ROOT_SEATTLE_MISC_DIR) + $(INS.file) + +$(ROOT_SEATTLE_DRV_DIR)/%: $(OBJS_DIR)/% $(ROOT_SEATTLE_DRV_DIR) + $(INS.file) + +# +# Include common targets. +# +include $(UTSBASE)/sun4u/seattle/Makefile.rules +include $(UTSBASE)/sun4u/Makefile.targ
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/usr/src/uts/sun4u/seattle/os/seattle.c Mon Nov 14 22:43:41 2005 -0800 @@ -0,0 +1,548 @@ +/* + * Copyright 2005 Sun Microsystems, Inc. All rights reserved. + * Use is subject to license terms. + */ + +#pragma ident "%Z%%M% %I% %E% SMI" + +#include <sys/param.h> +#include <sys/systm.h> +#include <sys/sysmacros.h> +#include <sys/sunddi.h> +#include <sys/esunddi.h> + +#include <sys/platform_module.h> +#include <sys/errno.h> +#include <sys/cpu_sgnblk_defs.h> +#include <sys/rmc_comm_dp.h> +#include <sys/rmc_comm_drvintf.h> +#include <sys/modctl.h> +#include <sys/lgrp.h> +#include <sys/memnode.h> +#include <sys/promif.h> + +/* Anything related to shared i2c access applies to Seattle only */ +#define SHARED_MI2CV_PATH "/i2c@1f,530000" +static dev_info_t *shared_mi2cv_dip; +static kmutex_t mi2cv_mutex; + +int (*p2get_mem_unum)(int, uint64_t, char *, int, int *); +static void cpu_sgn_update(ushort_t, uchar_t, uchar_t, int); +int (*rmc_req_now)(rmc_comm_msg_t *, uint8_t) = NULL; + +void +startup_platform(void) +{ + mutex_init(&mi2cv_mutex, NULL, NULL, NULL); +} + +int +set_platform_tsb_spares() +{ + return (0); +} + +void +set_platform_defaults(void) +{ + extern char *tod_module_name; + /* Set appropriate tod module */ + if (tod_module_name == NULL) + tod_module_name = "todm5823"; + + cpu_sgn_func = cpu_sgn_update; +} + +/* + * Definitions for accessing the pci config space of the isa node + * of Southbridge. + */ +static ddi_acc_handle_t isa_handle = NULL; /* handle for isa pci space */ + +/* + * Definition for accessing rmclomv + */ +#define RMCLOMV_PATHNAME "/pseudo/rmclomv@0" + +void +load_platform_drivers(void) +{ + dev_info_t *rmclomv_dip; + /* + * It is OK to return error because 'us' driver is not available + * in all clusters (e.g. missing in Core cluster). + */ + (void) i_ddi_attach_hw_nodes("us"); + + + /* + * mc-us3i must stay loaded for plat_get_mem_unum() + */ + if (i_ddi_attach_hw_nodes("mc-us3i") != DDI_SUCCESS) + cmn_err(CE_WARN, "mc-us3i driver failed to install"); + (void) ddi_hold_driver(ddi_name_to_major("mc-us3i")); + + /* + * load the GPIO driver for the ALOM reset and watchdog lines + */ + if (i_ddi_attach_hw_nodes("pmugpio") != DDI_SUCCESS) + cmn_err(CE_WARN, "pmugpio failed to install"); + else { + extern int watchdog_enable, watchdog_available; + extern int disable_watchdog_on_exit; + + /* + * Disable an active h/w watchdog timer upon exit to OBP. + */ + disable_watchdog_on_exit = 1; + + watchdog_enable = 1; + watchdog_available = 1; + } + (void) ddi_hold_driver(ddi_name_to_major("pmugpio")); + + /* + * Figure out which mi2cv dip is shared with OBP for the nvram + * device, so the lock can be acquired. + */ + shared_mi2cv_dip = e_ddi_hold_devi_by_path(SHARED_MI2CV_PATH, 0); + /* + * Load the environmentals driver (rmclomv) + * + * We need this driver to handle events from the RMC when state + * changes occur in the environmental data. + */ + if (i_ddi_attach_hw_nodes("rmc_comm") != DDI_SUCCESS) { + cmn_err(CE_WARN, "rmc_comm failed to install"); + } else { + (void) ddi_hold_driver(ddi_name_to_major("rmc_comm")); + + rmclomv_dip = e_ddi_hold_devi_by_path(RMCLOMV_PATHNAME, 0); + if (rmclomv_dip == NULL) { + cmn_err(CE_WARN, "Could not install rmclomv driver\n"); + } + } + + /* + * create a handle to the rmc_comm_request_nowait() function + * inside the rmc_comm module. + * + * The Seattle/Boston todm5823 driver will use this handle to + * use the rmc_comm_request_nowait() function to send time/date + * updates to ALOM. + */ + rmc_req_now = (int (*)(rmc_comm_msg_t *, uint8_t)) + modgetsymvalue("rmc_comm_request_nowait", 0); +} + +/* + * This routine is needed if a device error or timeout occurs before the + * driver is loaded. + */ +/*ARGSUSED*/ +int +plat_ide_chipreset(dev_info_t *dip, int chno) +{ + int ret = DDI_SUCCESS; + + if (isa_handle == NULL) { + return (DDI_FAILURE); + } + + /* + * This will be filled in with the reset logic + * for the ULI1573 when that becomes available. + * currently this is just a stub. + */ + return (ret); +} + + +/*ARGSUSED*/ +int +plat_cpu_poweron(struct cpu *cp) +{ + return (ENOTSUP); /* not supported on this platform */ +} + +/*ARGSUSED*/ +int +plat_cpu_poweroff(struct cpu *cp) +{ + return (ENOTSUP); /* not supported on this platform */ +} + +/*ARGSUSED*/ +void +plat_freelist_process(int mnode) +{ +} + +char *platform_module_list[] = { + "mi2cv", + "pca9556", + (char *)0 +}; + +/*ARGSUSED*/ +void +plat_tod_fault(enum tod_fault_type tod_bad) +{ +} + +/*ARGSUSED*/ +int +plat_get_mem_unum(int synd_code, uint64_t flt_addr, int flt_bus_id, + int flt_in_memory, ushort_t flt_status, char *buf, int buflen, int *lenp) +{ + if (flt_in_memory && (p2get_mem_unum != NULL)) + return (p2get_mem_unum(synd_code, P2ALIGN(flt_addr, 8), + buf, buflen, lenp)); + else + return (ENOTSUP); +} + +/*ARGSUSED*/ +int +plat_get_cpu_unum(int cpuid, char *buf, int buflen, int *lenp) +{ + if (snprintf(buf, buflen, "MB") >= buflen) { + return (ENOSPC); + } else { + *lenp = strlen(buf); + return (0); + } +} + +/* + * Our nodename has been set, pass it along to the RMC. + */ +void +plat_nodename_set(void) +{ + rmc_comm_msg_t req; /* request */ + int (*rmc_req_res)(rmc_comm_msg_t *, rmc_comm_msg_t *, time_t) = NULL; + + /* + * find the symbol for the mailbox routine + */ + rmc_req_res = (int (*)(rmc_comm_msg_t *, rmc_comm_msg_t *, time_t)) + modgetsymvalue("rmc_comm_request_response", 0); + + if (rmc_req_res == NULL) { + return; + } + + /* + * construct the message telling the RMC our nodename + */ + req.msg_type = DP_SET_CPU_NODENAME; + req.msg_len = strlen(utsname.nodename) + 1; + req.msg_bytes = 0; + req.msg_buf = (caddr_t)utsname.nodename; + + /* + * ship it + */ + (void) (rmc_req_res)(&req, NULL, 2000); +} + +sig_state_t current_sgn; + +/* + * cpu signatures - we're only interested in the overall system + * "signature" on this platform - not individual cpu signatures + */ +/*ARGSUSED*/ +static void +cpu_sgn_update(ushort_t sig, uchar_t state, uchar_t sub_state, int cpuid) +{ + dp_cpu_signature_t signature; + rmc_comm_msg_t req; /* request */ + int (*rmc_req_res)(rmc_comm_msg_t *, rmc_comm_msg_t *, time_t) = NULL; + int (*rmc_req_now)(rmc_comm_msg_t *, uint8_t) = NULL; + + + /* + * Differentiate a panic reboot from a non-panic reboot in the + * setting of the substate of the signature. + * + * If the new substate is REBOOT and we're rebooting due to a panic, + * then set the new substate to a special value indicating a panic + * reboot, SIGSUBST_PANIC_REBOOT. + * + * A panic reboot is detected by a current (previous) signature + * state of SIGST_EXIT, and a new signature substate of SIGSUBST_REBOOT. + * The domain signature state SIGST_EXIT is used as the panic flow + * progresses. + * + * At the end of the panic flow, the reboot occurs but we should know + * one that was involuntary, something that may be quite useful to know + * at OBP level. + */ + if (state == SIGST_EXIT && sub_state == SIGSUBST_REBOOT) { + if (current_sgn.state_t.state == SIGST_EXIT && + current_sgn.state_t.sub_state != SIGSUBST_REBOOT) + sub_state = SIGSUBST_PANIC_REBOOT; + } + + /* + * offline and detached states only apply to a specific cpu + * so ignore them. + */ + if (state == SIGST_OFFLINE || state == SIGST_DETACHED) { + return; + } + + current_sgn.signature = CPU_SIG_BLD(sig, state, sub_state); + + /* + * find the symbol for the mailbox routine + */ + rmc_req_res = (int (*)(rmc_comm_msg_t *, rmc_comm_msg_t *, time_t)) + modgetsymvalue("rmc_comm_request_response", 0); + if (rmc_req_res == NULL) { + return; + } + + /* + * find the symbol for the mailbox routine + */ + rmc_req_now = (int (*)(rmc_comm_msg_t *, uint8_t)) + modgetsymvalue("rmc_comm_request_nowait", 0); + if (rmc_req_now == NULL) { + return; + } + + signature.cpu_id = -1; + signature.sig = sig; + signature.states = state; + signature.sub_state = sub_state; + req.msg_type = DP_SET_CPU_SIGNATURE; + req.msg_len = (int)(sizeof (signature)); + req.msg_bytes = 0; + req.msg_buf = (caddr_t)&signature; + + /* + * ship it + * - note that for panic or reboot need to send with nowait/urgent + */ + if (state == SIGST_EXIT && (sub_state == SIGSUBST_HALT || + sub_state == SIGSUBST_REBOOT || sub_state == SIGSUBST_ENVIRON || + sub_state == SIGSUBST_PANIC_REBOOT)) + (void) (rmc_req_now)(&req, RMC_COMM_DREQ_URGENT); + else + (void) (rmc_req_res)(&req, NULL, 2000); +} + +/* + * Fiesta support for lgroups. + * + * On fiesta platform, an lgroup platform handle == CPU id + */ + +/* + * Macro for extracting the CPU number from the CPU id + */ +#define CPUID_TO_LGRP(id) ((id) & 0x7) +#define PLATFORM_MC_SHIFT 36 + +/* + * Return the platform handle for the lgroup containing the given CPU + */ +void * +plat_lgrp_cpu_to_hand(processorid_t id) +{ + return ((void *) CPUID_TO_LGRP(id)); +} + +/* + * Platform specific lgroup initialization + */ +void +plat_lgrp_init(void) +{ + pnode_t curnode; + char tmp_name[MAXSYSNAME]; + int portid; + int cpucnt = 0; + int max_portid = -1; + extern uint32_t lgrp_expand_proc_thresh; + extern uint32_t lgrp_expand_proc_diff; + extern pgcnt_t lgrp_mem_free_thresh; + extern uint32_t lgrp_loadavg_tolerance; + extern uint32_t lgrp_loadavg_max_effect; + extern uint32_t lgrp_load_thresh; + extern lgrp_mem_policy_t lgrp_mem_policy_root; + + /* + * Count the number of CPUs installed to determine if + * NUMA optimization should be enabled or not. + * + * All CPU nodes reside in the root node and have a + * device type "cpu". + */ + curnode = prom_rootnode(); + for (curnode = prom_childnode(curnode); curnode; + curnode = prom_nextnode(curnode)) { + bzero(tmp_name, MAXSYSNAME); + if (prom_getproplen(curnode, OBP_NAME) < MAXSYSNAME) { + if (prom_getprop(curnode, OBP_NAME, + (caddr_t)tmp_name) == -1 || prom_getprop(curnode, + OBP_DEVICETYPE, tmp_name) == -1 || strcmp(tmp_name, + "cpu") != 0) + continue; + + cpucnt++; + if (prom_getprop(curnode, "portid", (caddr_t)&portid) != + -1 && portid > max_portid) + max_portid = portid; + } + } + if (cpucnt <= 1) + max_mem_nodes = 1; + else if (max_portid >= 0 && max_portid < MAX_MEM_NODES) + max_mem_nodes = max_portid + 1; + + /* + * Set tuneables for fiesta architecture + * + * lgrp_expand_proc_thresh is the minimum load on the lgroups + * this process is currently running on before considering + * expanding threads to another lgroup. + * + * lgrp_expand_proc_diff determines how much less the remote lgroup + * must be loaded before expanding to it. + * + * Optimize for memory bandwidth by spreading multi-threaded + * program to different lgroups. + */ + lgrp_expand_proc_thresh = lgrp_loadavg_max_effect - 1; + lgrp_expand_proc_diff = lgrp_loadavg_max_effect / 2; + lgrp_loadavg_tolerance = lgrp_loadavg_max_effect / 2; + lgrp_mem_free_thresh = 1; /* home lgrp must have some memory */ + lgrp_expand_proc_thresh = lgrp_loadavg_max_effect - 1; + lgrp_mem_policy_root = LGRP_MEM_POLICY_NEXT; + lgrp_load_thresh = 0; + + mem_node_pfn_shift = PLATFORM_MC_SHIFT - MMU_PAGESHIFT; +} + +/* + * Return latency between "from" and "to" lgroups + * + * This latency number can only be used for relative comparison + * between lgroups on the running system, cannot be used across platforms, + * and may not reflect the actual latency. It is platform and implementation + * specific, so platform gets to decide its value. It would be nice if the + * number was at least proportional to make comparisons more meaningful though. + * NOTE: The numbers below are supposed to be load latencies for uncached + * memory divided by 10. + */ +int +plat_lgrp_latency(void *from, void *to) +{ + /* + * Return remote latency when there are more than two lgroups + * (root and child) and getting latency between two different + * lgroups or root is involved + */ + if (lgrp_optimizations() && (from != to || from == + (void *) LGRP_DEFAULT_HANDLE || to == (void *) LGRP_DEFAULT_HANDLE)) + return (17); + else + return (12); +} + +int +plat_pfn_to_mem_node(pfn_t pfn) +{ + ASSERT(max_mem_nodes > 1); + return (pfn >> mem_node_pfn_shift); +} + +/* + * Assign memnode to lgroups + */ +void +plat_fill_mc(pnode_t nodeid) +{ + int portid; + + /* + * Memory controller portid == global CPU id + */ + if ((prom_getprop(nodeid, "portid", (caddr_t)&portid) == -1) || + (portid < 0)) + return; + + if (portid < max_mem_nodes) + plat_assign_lgrphand_to_mem_node((lgrp_handle_t)portid, portid); +} + +/* ARGSUSED */ +void +plat_build_mem_nodes(u_longlong_t *list, size_t nelems) +{ + size_t elem; + pfn_t basepfn; + pgcnt_t npgs; + + /* + * Boot install lists are arranged <addr, len>, <addr, len>, ... + */ + for (elem = 0; elem < nelems; elem += 2) { + basepfn = btop(list[elem]); + npgs = btop(list[elem+1]); + mem_node_add_slice(basepfn, basepfn + npgs - 1); + } +} + +/* + * Common locking enter code + */ +void +plat_setprop_enter(void) +{ + mutex_enter(&mi2cv_mutex); +} + +/* + * Common locking exit code + */ +void +plat_setprop_exit(void) +{ + mutex_exit(&mi2cv_mutex); +} + +/* + * Called by mi2cv driver + */ +void +plat_shared_i2c_enter(dev_info_t *i2cnexus_dip) +{ + if (i2cnexus_dip == shared_mi2cv_dip) { + plat_setprop_enter(); + } +} + +/* + * Called by mi2cv driver + */ +void +plat_shared_i2c_exit(dev_info_t *i2cnexus_dip) +{ + if (i2cnexus_dip == shared_mi2cv_dip) { + plat_setprop_exit(); + } +} +/* + * Called by todm5823 driver + */ +void +plat_rmc_comm_req(struct rmc_comm_msg *request) +{ + if (rmc_req_now) + (void) rmc_req_now(request, 0); +}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/usr/src/uts/sun4u/seattle/platmod/Makefile Mon Nov 14 22:43:41 2005 -0800 @@ -0,0 +1,88 @@ +# +# Copyright 2005 Sun Microsystems, Inc. All rights reserved. +# Use is subject to license terms. +# +# ident "%Z%%M% %I% %E% SMI" +# +# uts/sun4u/seattle/platmod/Makefile +# +# This makefile drives the production of the sun4u seattle platform module. +# +# sun4u implementation architecture dependent +# + +# +# Path to the base of the uts directory tree (usually /usr/src/uts). +# +UTSBASE = ../../.. + +# +# Define the module and object file sets. +# +MODULE = platmod +OBJECTS = $(SEATTLE_OBJS:%=$(OBJS_DIR)/%) +LINTS = $(SEATTLE_OBJS:%.o=$(LINTS_DIR)/%.ln) +ROOTMODULE = $(ROOT_SEATTLE_MISC_DIR)/$(MODULE) + +PLAT_DIR = . +HERE = ../seattle/platmod + +# +# Include common rules. +# +include $(UTSBASE)/sun4u/seattle/Makefile.seattle + +# +# Override defaults +# +CLEANFILES += $(PLATLIB) $(SYM_MOD) + +# +# Define targets +# +ALL_TARGET = $(SYM_MOD) +LINT_TARGET = $(MODULE).lint +INSTALL_TARGET = $(BINARY) $(ROOTMODULE) + +# +# lint pass one enforcement +# +CFLAGS += $(CCVERBOSE) + +# +# Default build targets. +# +.KEEP_STATE: + +def: $(DEF_DEPS) + +all: $(ALL_DEPS) + +clean: $(CLEAN_DEPS) + +clobber: $(CLOBBER_DEPS) + +lint: $(LINT_DEPS) + +modlintlib: $(MODLINTLIB_DEPS) + +clean.lint: $(CLEAN_LINT_DEPS) + +install: $(INSTALL_DEPS) + +check: + +LINT_LIB_DIR = $(SEATTLE_LINT_LIB_DIR) + +$(PLATLIB): $(BINARY) + ${LD} -o $(PLATLIB) -G $(BINARY) + +$(SYM_MOD): $(UNIX_O) $(PLATLIB) + @echo "resolving symbols against unix.o" + @(cd $(UNIX_DIR); pwd; \ + PLAT_DIR=$(HERE) SYM_MOD=$(HERE)/$(SYM_MOD) $(MAKE) symcheck) + +# +# Include common targets. +# +include $(UTSBASE)/sun4u/seattle/Makefile.targ
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/usr/src/uts/sun4u/sys/epic.h Mon Nov 14 22:43:41 2005 -0800 @@ -0,0 +1,140 @@ +/* + * CDDL HEADER START + * + * The contents of this file are subject to the terms of the + * Common Development and Distribution License, Version 1.0 only + * (the "License"). You may not use this file except in compliance + * with the License. + * + * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE + * or http://www.opensolaris.org/os/licensing. + * See the License for the specific language governing permissions + * and limitations under the License. + * + * When distributing Covered Code, include this CDDL HEADER in each + * file and include the License file at usr/src/OPENSOLARIS.LICENSE. + * If applicable, add the following below this CDDL HEADER, with the + * fields enclosed by brackets "[]" replaced with your own identifying + * information: Portions Copyright [yyyy] [name of copyright owner] + * + * CDDL HEADER END + */ + +/* + * Copyright 2005 Sun Microsystems, Inc. All rights reserved. + * Use is subject to license terms. + */ + +#ifndef _EPIC_H +#define _EPIC_H + +#pragma ident "%Z%%M% %I% %E% SMI" + +#ifdef __cplusplus +extern "C" { +#endif + + +/* + * EPIC is slow device. Need to interlace delay between two accesses. + */ +#define EPIC_DELAY 10000 + +/* + * EPIC Registers from Indirect Address/Data + */ +#define EPIC_FIRE_INTERRUPT 0x01 +#define EPIC_FIRE_INT_MASK 0x01 + +#define EPIC_IND_FW_VERSION 0x05 + +#define EPIC_IND_LED_STATE0 0x06 + +#define EPIC_ALERT_LED_MASK 0x0C +#define EPIC_ALERT_LED_OFF 0x00 +#define EPIC_ALERT_LED_ON 0x04 + +#define EPIC_POWER_LED_MASK 0x30 +#define EPIC_POWER_LED_OFF 0x00 +#define EPIC_POWER_LED_ON 0x10 +#define EPIC_POWER_LED_SB_BLINK 0x20 +#define EPIC_POWER_LED_FAST_BLINK 0x30 + +#define EPIC_HOST_INT_ENABLE_REG 0x1a +#define EPIC_POWER_BUTTON_INT 0x01 +#define EPIC_HOST_INTR_CLEAR 0x00 +#define EPIC_POWER_BUTTON_INT_MASK 0x01 +#define EPIC_HOST_INT_STATUS_REG 0x1b + +#define EPIC_ATOM_DATA 0x80 +#define EPIC_ATOM_ADDR 0x81 + +#define EPIC_ATOM_INTR_CLEAR 0x01 +#define EPIC_ATOM_INTR_READ 0x02 +#define EPIC_ATOM_INTR_ENABLE 0x03 + + +/* + * EPIC ioctl commands + */ + +#define EPIC_SET_ALERT_LED 0x11 +#define EPIC_RESET_ALERT_LED 0x12 + +#define EPIC_SET_POWER_LED 0x21 +#define EPIC_RESET_POWER_LED 0x22 +#define EPIC_SB_BL_POWER_LED 0x23 +#define EPIC_FAST_BL_POWER_LED 0x24 + +#define EPIC_GET_FW 0x30 + +/* + * READ/WRITE macros for the port used by epic (LED) driver + */ + +#define EPIC_READ(HANDLE, REG, LHS, ADDR)\ + drv_usecwait(EPIC_DELAY);\ + (void) ddi_put8((HANDLE),\ + (uint8_t *)(REG)+\ + EPIC_IND_ADDR, (ADDR));\ + drv_usecwait(EPIC_DELAY);\ + (LHS) = ddi_get8((HANDLE),\ + (uint8_t *)(REG)+\ + EPIC_IND_DATA); + +#define EPIC_WRITE(HANDLE, REG, ADDR, MASK, DATA)\ + drv_usecwait(EPIC_DELAY);\ + (void) ddi_put8((HANDLE),\ + (uint8_t *)(REG)+\ + EPIC_IND_ADDR, (ADDR));\ + drv_usecwait(EPIC_DELAY);\ + (void) ddi_put8((HANDLE),\ + (uint8_t *)(REG)+\ + EPIC_WRITE_MASK, (MASK));\ + drv_usecwait(EPIC_DELAY);\ + (void) ddi_put8((HANDLE),\ + (uint8_t *)(REG)+\ + EPIC_IND_DATA, (DATA)); + +/* + * READ/WRITE macros for the port used by power button driver + */ + +#define EPIC_RD(HANDLE, REG, LHS)\ + drv_usecwait(EPIC_DELAY);\ + (LHS) = ddi_get8((HANDLE),\ + (uint8_t *)(REG)+\ + EPIC_ATOM_DATA); + +#define EPIC_WR(HANDLE, REG, DATA)\ + drv_usecwait(EPIC_DELAY);\ + (void) ddi_put8((HANDLE),\ + (uint8_t *)(REG)+\ + EPIC_ATOM_ADDR, (DATA)); + + +#ifdef __cplusplus +} +#endif + +#endif /* _EPIC_H */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/usr/src/uts/sun4u/sys/i2c/clients/adm1026_impl.h Mon Nov 14 22:43:41 2005 -0800 @@ -0,0 +1,134 @@ +/* + * CDDL HEADER START + * + * The contents of this file are subject to the terms of the + * Common Development and Distribution License, Version 1.0 only + * (the "License"). You may not use this file except in compliance + * with the License. + * + * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE + * or http://www.opensolaris.org/os/licensing. + * See the License for the specific language governing permissions + * and limitations under the License. + * + * When distributing Covered Code, include this CDDL HEADER in each + * file and include the License file at usr/src/OPENSOLARIS.LICENSE. + * If applicable, add the following below this CDDL HEADER, with the + * fields enclosed by brackets "[]" replaced with your own identifying + * information: Portions Copyright [yyyy] [name of copyright owner] + * + * CDDL HEADER END + */ +/* + * Copyright 2005 Sun Microsystems, Inc. All rights reserved. + * Use is subject to license terms. + */ + +#ifndef _ADM1026_IMPL_H +#define _ADM1026_IMPL_H + +#pragma ident "%Z%%M% %I% %E% SMI" + +#ifdef __cplusplus +extern "C" { +#endif + + +#include <sys/i2c/clients/i2c_client.h> + +typedef struct adm1026_unit { + kmutex_t adm1026_mutex; + int adm1026_oflag; + i2c_client_hdl_t adm1026_hdl; +} adm1026_unit_t; + +/* + * ADM1026 has 4 GPIO Config registers used to set Polarity and Direction. + * To config a particular GPIO, the low 16 bits of the reg_mask member + * of the i2c_gpio_t struct is used as a logical mask to indicate which + * GPIO pin(s) to access and the reg_val member is used to set/clear those + * GPIO pins' P or D bit(s). + * + * GPIO# 3 2 1 0 + * +--+--+--+--+ + * |PD|PD|PD|PD| <-- ADM1026_GPIO_CFG1 + * +--+--+--+--+ Logical Mask: 0x000f + * + * GPIO# 7 6 5 4 + * +--+--+--+--+ + * |PD|PD|PD|PD| <-- ADM1026_GPIO_CFG2 + * +--+--+--+--+ Logical Mask: 0x00f0 + * + * GPIO# 11 10 9 8 + * +--+--+--+--+ + * |PD|PD|PD|PD| <-- ADM1026_GPIO_CFG3 + * +--+--+--+--+ Logical Mask: 0x0f00 + * + * GPIO# 15 14 13 12 + * +--+--+--+--+ + * |PD|PD|PD|PD| <-- ADM1026_GPIO_CFG4 + * +--+--+--+--+ Logical Mask: 0xf000 + */ + +#define ADM1026_GPIO_CFG1 0x08 /* Config GPIO 03-00 in/out + hi/lo */ +#define ADM1026_GPIO_CFG2 0x09 /* Config GPIO 07-04 in/out + hi/lo */ +#define ADM1026_GPIO_CFG3 0x0a /* Config GPIO 11-08 in/out + hi/lo */ +#define ADM1026_GPIO_CFG4 0x0b /* Config GPIO 15-12 in/out + hi/lo */ + +/* + * ADM1026 has 2 GPIO Output registers to set GPIO pins. + * To set a particular GPIO pin, the low 16 bits of the reg_mask member + * of the i2c_gpio_t struct is used as a 1:1 mask of the 16 GPIO pin(s) + * to access and the reg_val member is used to set/clear the GPIO pin(s). + * + * GPIO# 76 54 32 10 + * + * +--+--+--+--+ + * |xx|xx|xx|xx| <-- ADM1026_STS_REG5 + * +--+--+--+--+ Logical Mask: 0x00ff + * + * GPIO# 11 11 11 98 + * 54 32 10 + * +--+--+--+--+ + * |xx|xx|xx|xx| <-- ADM1026_STS_REG6 + * +--+--+--+--+ Logical Mask: 0xff00 + */ + +#define ADM1026_STS_REG5 0x24 /* GPIO 07-00 */ +#define ADM1026_STS_REG6 0x25 /* GPIO 15-08 */ + +#define OUTPUT_SHIFT 8 +#define BITSPERCFG 2 /* Polarity + Dir bits per GPIO cfg */ + +#define DIR_BIT 1 /* Dir bit = lo bit of GPIO cfg */ +#define POLARITY_BIT 2 /* Polarity bit = hi bit GPIO cfg */ + +#define BYTES_PER_OUTPUT 2 + +#define BYTES_PER_CONFIG 4 + +#define NUMBER_OF_GPIOS 16 + +#define GPIOS_PER_CFG_BYTE 4 + +#define GPIO_CFG_MASK 0xf + + +#ifdef DEBUG + +static int adm1026_dbg = 0; +#define D1CMN_ERR(ARGS) { if (adm1026_dbg & 0x1) cmn_err ARGS; } +#define D2CMN_ERR(ARGS) { if (adm1026_dbg & 0x2) cmn_err ARGS; } + +#else + +#define D1CMN_ERR(ARGS) +#define D2CMN_ERR(ARGS) + +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* _ADM1026_IMPL_H */